Scanning E-Beam Annealing of Mos Devices

Abstract

Conditions for the scanning e-beam activation of P and As implanted source and drain junctions in production NMOS Si gate devices have been established. MOS devices with e-beam annealed, As-implanted, source and drain regions have been produced. The transistor parameters are found to be close to those of furnace annealed control devices, but e-beam annealed devices exbibit a smaller short-channel effect.

Noise and electrical characterisation of e-beam rapid isothermally annealed n-channel MOSFETS

“…Speight et a1 and McMahon er al [4,5] reported a small negative shift in the threshold voltages ( V , ) of e-beam annealed polysilicon MOSFETS, but only for the e-beam incident on the wafer front. Some oxide damage was found in aluminium gate capacitors, but this damage was annealed with a post-metallisation anneal at 350 "C.…”