1998
DOI: 10.1109/16.658839
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Scaling trends for device performance and reliability in channel-engineered n-MOSFETs

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Cited by 13 publications
(7 citation statements)
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“…the expression of drain current for generalized gate geometry can be obtained by using (9), (10), (11) and (12). The variation can be considered by altering the doping concentration or dielectric constant of the insulator or thickness of the insulator (for gate insulator geometry) or workfunction of the metal in various regions.…”
Section: Cut-off Frequency Modelmentioning
confidence: 99%
“…the expression of drain current for generalized gate geometry can be obtained by using (9), (10), (11) and (12). The variation can be considered by altering the doping concentration or dielectric constant of the insulator or thickness of the insulator (for gate insulator geometry) or workfunction of the metal in various regions.…”
Section: Cut-off Frequency Modelmentioning
confidence: 99%
“…However, when the transistor size is below 100 nm physical phenomena like short channel effect and channel doping fluctuations become more dominant and the further scaling down of the device dimensions will not lead to a considerable improvement in the device performance. To overcome this limitation, channel engineering structures have been proposed and fabricated [1][2][3][4][5]. However, it has been mentioned [6] that channel engineering can improve the performance of a circuit manufactured by a certain technology only within 10%.…”
Section: Introductionmentioning
confidence: 99%
“…Owing to continuous scaling down of the MOSFET device dimensions several hundred millions of transistors were being integrated on a single chip. In these devices reliability problems have been extremely stringent (Taked, 1997;Williams et al, 1998;Thomas, 1998). The high field reliability endurance of short-channel MOS devices will be still a critical constrain.…”
Section: Introductionmentioning
confidence: 99%