Run-Time HW/SW Scheduling of Data Flow Applications on Reconfigurable Architectures

Ghaffari, Fakhreddine; Miramond, Benoît; Verdier, François

doi:10.1155/2009/976296

Cited by 5 publications

(13 citation statements)

References 5 publications

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“…Several works were devoted to scheduling and placement of HW tasks (or reconfigurable hardware accelerators) on the FPGA [25][26][27][28][29][30][31]. In [25], an online scheduling and placement algorithm targeting 1D and 2D model of reconfigurable area is presented.…”

Section: Related Researchmentioning

confidence: 99%

“…The work considers nonpreemptable HW tasks which execute independently of each other. On the contrary, works in [26][27][28][29][30]32] present scheduling strategies for reconfigurable area divided into fixed slots. As modern FPGA architectures are becoming increasingly heterogeneous in terms of their resources, this model of a reconfigurable area seems to be more applicable.…”

Section: Related Researchmentioning

confidence: 99%

“…The online scheduling step is implemented in hardware as dedicated logic. [27] presents another hardware implementation of a run-time scheduler utilizing information extracted from the CDFGs. Similarly to work presented in [26].…”

Section: Related Researchmentioning

confidence: 99%

“…Configuration Access Port OS (CAP-OS) [31] shows a mixed offline/online scheduling strategy utilizing information extracted from the CDFGs and is implemented on Xilkernel OS [33] running on a microprocessor. In the approaches presented in [26,27,31], HW tasks comprising the CDFGs execute in a nonpreemptive manner till their completion. Work in [32] presents a non-preemptive scheduling strategy where HW tasks may voluntarily relinquish the allocated resources at certain points of their execution.…”

Section: Related Researchmentioning

confidence: 99%

See 3 more Smart Citations

Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs

Jozwik

Honda

Edahiro

et al. 2013

International Journal of Reconfigurable Computing

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Dynamic Partial Reconfiguration technology coupled with an Operating System for Reconfigurable Systems (OS4RS) allows for implementation of a hardware task concept, that is, an active computing object which can contend for reconfigurable computing resources and request OS services in a way software task does in a conventional OS. In this work, we show a complete model and implementation of a lightweight OS4RS supporting preemptable and clock-scalable hardware tasks. We also propose a novel, lightweight scheduling mechanism allowing for timely and priority-based reservation of reconfigurable resources, which aims at usage of preemption only at the time it brings benefits to the performance of a system. The architecture of the scheduler and the way it schedules allocations of the hardware tasks result in shorter latency of system calls, thereby reducing the overall OS overhead. Finally, we present a novel model and implementation of a channel-based intertask communication and synchronization suitable for software-hardware multitasking with preemptable and clock-scalable hardware tasks. It allows for optimizations of the communication on per task basis and utilizes point-to-point message passing rather than shared-memory communication, whenever it is possible. Extensive overhead tests of the OS4RS services as well as application speedup tests show efficiency of our approach.

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Section: Related Researchmentioning

confidence: 99%

Section: Related Researchmentioning

confidence: 99%

Section: Related Researchmentioning

confidence: 99%

Section: Related Researchmentioning

confidence: 99%

See 2 more Smart Citations

Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs

Jozwik

Honda

Edahiro

et al. 2013

International Journal of Reconfigurable Computing

View full text Add to dashboard Cite

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“…On the other hand, when it is about an online context, priority-based scheduling (dispatching rules and list scheduling) is more rapid to have reasonable solutions. However, priority-based scheduling is inefficient and not appropriate for systems where the required scheduling behavior changes during runtime [29]. Therefore, it is necessary, in our case, to combine different techniques together to endow the scheduling approach with the required flexibility and robustness.…”

Section: Scheduling Under Uncertaintymentioning

confidence: 99%

Dynamic Application Model for Scheduling with Uncertainty on Reconfigurable Architectures

Ktata

Ghaffari

Granado

et al. 2011

International Journal of Reconfigurable Computing

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Applications executed on embedded systems require dynamicity and flexibility according to user and environment needs. Dynamically reconfigurable architecture could satisfy these requirements but needs efficient mechanisms to be managed efficiently. In this paper, we propose a dedicated application modeling technique that helps to establish a predictive scheduling approach to manage a dynamically reconfigurable architecture named OLLAF. OLLAF is designed to support an operating system that deals with complex embedded applications. This model will be used for a predictive scheduling based on an early estimation of our application dynamicity. A vision system of a mobile robot application has been used to validate the presented model and scheduling approach. We have demonstrated that with our modeling we can realize an efficient predictive scheduling on a robot vision application with a mean error of 6.5%.

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Multi-shape tasks scheduling for online multitasking on FPGAs

Wassi

Benkhelifa

Lawday

et al. 2014

2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)

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Reconfigurable system on Chip (RSoC) is seen as a possible future trend in embedded electronic. This work focuses on the management of dynamically reconfigurable resources (eg. FPGA) using a real time operating system (RTOS) especially designed for such platform. Scheduler and placer are crucial OS services to allow for online management of the computing resources. In this work we introduce multi-shape task management. In multi-shape tasks management the system can choose between several versions of the same task featuring different shapes, sizes and execution times, in order to optimize resource usage. In this paper we present a comparison of several scenarios of a scheduling/placement algorithm for hardware tasks on FPGA using different number of shapes per task. Studied cases have been implemented in C++ and compared regarding runtime overhead or execution time and system efficiency. We show that, compared to a reference case as single-shape EDF (earliest deadline first) algorithm, the FPGA utilization ratio is significantly improved and the task rejection ratio is halved by using only two shapes per task.

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Run-Time HW/SW Scheduling of Data Flow Applications on Reconfigurable Architectures

Cited by 5 publications

References 5 publications

Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs

Rainbow: An Operating System for Software-Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs

Dynamic Application Model for Scheduling with Uncertainty on Reconfigurable Architectures

Multi-shape tasks scheduling for online multitasking on FPGAs

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