Routability-driven placement and white space allocation

Abstract

In this paper, we present a congestion-driven placement flow. First, we consider in the global placement stage the routing demand to replace cells in order to avoid congested regions. Then we allocate appropriate amounts of white space into different regions of the chip according to the congestion map. Finally, a detailed placer is applied to legalize placements while preserving the distributions of white space. Experimental results show that our placement flow can achieve the best routabilities with shorter routed wirelengths among publicly available placement tools. Moreover, our white space allocation approach can significantly improve the routability of placements generated by other placement tools.