Robust Underfill Selection Methodology for Flip Chip

Abstract

Underfill is one of the crucial materials in flip chip (FC) packages. The role of underfill is not only to protect the solder bumps but to minimize package warpage, and to protect the fragile low k dielectric at end of line (EOL), moisture resistance test (MRT), and temperature cycle B (TCB) conditions. As packages move towards green products, the complexity of selecting a good underfill increases. The interaction of high Pb or eutectic solder with the underfill is different than that of Pb free solder. Moreover Pb free solder behavior for FC bumps is just being explored in the literature. Besides Pb free solder, other parameters like die passivation, bump height and pitch, under bump metallurgy (UBM) metallization, and package substrate are also extremely important for underfill selection. As the design of the package continues to change smaller package, tighter bump pitch and thinner core and build up (BU) layers, all of these parameters are directly related to package reliability. Sometimes an underfill good for a smaller die, body size, taller bump height, and pitch doesn’t necessarily mean it will be appropriate for a bigger die with larger body, and tighter bumps. So there are lots of variables in the package that directly affect the reliability. A good underfill should have very good adhesion between underfill and die passivation at room temperature, and moderate adhesion at underfill Tg. Adhesion properties are solely depend on chemistry of the underfill. Therefore to determine a good underfill for a bigger die and body size, we need to have a sequential selection methodology. In this paper a sequential selection methodology is used to eliminate the unsuccessful underfill candidates and select the best one which comfortably satisfies the requirements for all different solder alloys, and a wider range of package geometries. Important selection criteria including underfill workability issues and modeling data are also discussed.

Validation of warpage for small form factor flip-chip BGA by experimental and numerical methodology

“…Many methodologies of underfill selection have been investigated to enhance the IC package reliabilities [6,7]. However, there is little concern for small form factor FCBGA undergoing lead-free IR-reflow.…”