Robust and area-efficient nLDMOS-SCR with waffle layout structure for high-voltage ESD protection

Abstract

A novel waffle-type nLDMOS-SCR ESD clamp with compact source and drain for high-voltage ESD protection is proposed and realised using the 0.35 mm, 30/5 V bipolar-CMOS-DMOS (BCD) process. With this new structure, a high ESD failure current of 4.4 A was achieved with a total channel width of only 60 mm. Considering the area efficiency, the waffle-type structure provides more than 30% higher current handling capability than the conventional ones. Because of its better robustness and area efficiency, the waffle-type structure should be a promising layout for high-voltage ESD protection applications.Introduction: Laterally-diffused metal-oxide-semiconductor (LDMOS) power transistor arrays are widely used as output drivers in highvoltage (HV) circuits such as power management applications, lightemitting diode (LED) and liquid-crystal display (LCD) driver circuits [1,2]. To achieve a high-voltage operation and a high current driven capability, the sizes of LDMOS transistors, typically with widths over 10000 mm, are much larger than those of other CMOS devices. However, these LDMOS-based driver circuits are still vulnerable to ESD stresses, which are often attributed to the inhomogeneous triggering of the parasitic bipolar junction transitor (BJT) and base push-out effect [3]. The designs of LDMOS-based ESD clamps, as well as the self-protection scheme of an LDMOS output driver are still challenging issues [4].A promising technique to sidestep these weaknesses is to use an embedded sillicon controlled rectifier (SCR) in the LDMOS structure (LDMOS-SCR) [5]. The LDMOS-SCR goes into the SCR mode under a high voltage or a large current condition. The traditional layout employs the stripe style. In this Letter, a novel waffle layout LDMOS-SCR structure is proposed and the performance is verified with a 0.35 mm 30/5 V BCD process. We found that the device with this structure has better robustness and consumes less silicon area and thus has high practical values.

A New Dual-Direction SCR With High Holding Voltage and Low Dynamic Resistance for 5 V Application

“…In addition, more instances of electrostatic discharge (ESD) have been reported because of the reduction in the oxide film thickness and junction depth, resulting in more defects due to overvoltage, overcurrent, and heat generation [1], [2]. A silicon-controlled rectifier (SCR) is an ESD protection device in which both NPN and PNP parasitic bipolar transistors are latched to provide excellent current driving capability, making SCRs widely popular [3], [4]. During ESD, there are four types of discharge modes the positive-to-VSS (PS-mode), the negative-to-VSS (NS-mode), the positive-to-VDD (PD-mode), the negative-to-VDD (NDmode), with respect to VDD, VSS, and the pad depending on the polarity (positive or negative charge) [5], [6].…”

Layout geometry impact on nLDMOS devices for high‐voltage ESD protection

“…However, multi-fingered nLDMOS has a low human body mode (HBM) failure threshold, which is even worse than low-voltage NMOS devices, because of the inhomogeneous triggering and Kirk effect [2]. Thus, effective solutions, such as substrate-trigger, gate-driven techniques, embedding thyristor and bipolar trigger suppressing, have been proposed to enhance the ESD current handling capability of nLDMOS [3][4][5]. However, the impact of the layout geometry on the ESD performance of nLDMOS itself without any triggering technique and structure modification has not been discussed in detail in previous works.…”