Ring oscillator physical unclonable function with multi level supply voltages

Mansouri, Shohreh Sharif; Dubrova, Elena

doi:10.1109/iccd.2012.6378703

Cited by 32 publications

(16 citation statements)

References 4 publications

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“…However, this approach also requires a temperature sensor. Most recently, Mansouri and Dubrova [9] propose to apply different voltages on different inverters in the same ring oscillator. This approach also requires specialized circuits which can increase the hardware overhead.…”

Section: Related Workmentioning

confidence: 99%

“…Such delay difference is caused by the manufacture variation, but is very sensitive to voltage and temperature changes and thus may make the PUF output bits unreliable. There are many proposals to improve the reliability, most at expensive hardware cost with redundant ROs [1], temperature sensors [2,8], or additional circuitry for voltage control [9] or error correction [10,11,12]. A more detailed survey of the current state-of-the-art on RO PUF can be found in the section of related work.…”

Section: Introductionmentioning

confidence: 99%

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A Highly Flexible Ring Oscillator PUF

Gao

Lai

2014

Proceedings of the 51st Annual Design Automation Conference

100

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Physical Unclonable Function (PUF) is one of the most promising hardware features that can be utilized to improve system security. Ring Oscillator (RO) PUF captures the delay difference of a pair or a group of ROs introduced during fabrication process and defines PUF secrecy based on such difference. In this paper, we propose a framework to build RO PUF at inverter level, instead of RO level. This provides us the flexibility in choosing whether an inverter should be included in the RO-PUF and hence improve the security and reliability of RO PUF secrecy and reduce its hardware cost. Experimental results demonstrate that the PUF secrecy generated by our configurable RO PUFs is random (by passing the NIST randomness test) and unique from chip to chip. Our approach is more reliable against voltage and temperature variation than the original RO PUF and is 4X more hardware efficient than the robust 1-out-of-8 RO PUF.

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Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Highly Flexible Ring Oscillator PUF

Gao

Lai

2014

Proceedings of the 51st Annual Design Automation Conference

100

View full text Add to dashboard Cite

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“…Methods to correct the noisy bits by using fuzzy extractors [7] are also proposed to improve the reliability of the PUF at the cost of its hardware area, power and complexity of operation. In [10], multilevel supply voltages are used to stabilize the PUF responses at varying operating temperature, with the drawback of additional power management circuits for voltage monitoring and sequencing. In this paper, we propose a novel design of RO PUF that has much lower power and area consumptions than the conventional implementations, yet possesses enhanced reliability.…”

Section: Introductionmentioning

confidence: 99%

A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications

Cao

Zhang

Chang

et al. 2015

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

104

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Ring oscillator (RO)-based physical unclonable function (PUF) is resilient against noise impacts, but its response is susceptible to temperature variations. This paper presents a low-power and small footprint hybrid RO PUF with a very high temperature stability, which makes it an ideal candidate for lightweight applications. The negative temperature coefficient of the low-power subthreshold operation of current starved inverters is exploited to mitigate the variations of differential RO frequencies with temperature. The new architecture uses conspicuously simplified circuitries to generate and compare a large number of pairs of RO frequencies. The proposed ninestage hybrid RO PUF was fabricated using global foundry 65-nm CMOS technology. The PUF occupies only 250 µm 2 of chip area and consumes only 32.3 µW per challenge response pair at 1.2 V and 230 MHz. The measured average and worst-case reliability of its responses are 99.84% and 97.28%, respectively, over a wide range of temperature from −40 to 120 • C.Index Terms-Hardware security, physical unclonable function (PUF), process variation, ring oscillator (RO), temperature stability.

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“…Most PUF integrated circuits (ICs) developed up to now can be divided into two categories: delaybased (e.g., ring oscillator PUFs [5] and arbiter PUFs [4]) and memory-based (e.g., static random access memory (SRAM) PUFs [3]). They usually employ a standard cell library for circuit implementation.…”

Section: Introductionmentioning

confidence: 99%

MVL‐PUFs: multiple‐valued logic physical unclonable functions

Tao

Dubrova

2016

Circuit Theory & Apps

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Physical unclonable functions (PUFs) are promising hardware security primitives suitable for protecting resource-constrained devices. In this paper, we propose to use multiple-valued logic (MVL) for implementing hardware-efficient PUF integrated circuits. We show that by extracting device mismatch in either currentmode or voltage-mode MVL comparators, the proposed PUF circuits can generate unique and reliable chip identifiers. In order to stabilize PUF responses, we utilize multiple thresholds of MVL comparators, whose outputs are selected and combined according to the sensed temperature. To reduce power and further enhance reliability, the PUF circuits are biased in the weak-inversion region. Evaluation results show that the proposed MVL-PUFs are unique and reliable over a wide temperature range. In addition, they significantly improve the energy efficiency of the state-of-the-art PUFs.MVL-PUFS: MULTIPLE-VALUED LOGIC PHYSICAL UNCLONABLE FUNCTIONS 293 counterfeit compared with memories. A strong PUF can accept many challenges [12]. The arbiter PUF is an example of Strong PUFs. Strong PUFs can be used for challenge-response authentication. In this paper, we focus on implementing weak PUFs that have one input challenge.Multiple-valued logic (MVL) circuits, which employ more than two levels of signals have been studied for many decades. For examples, ternary and quaternary-valued logics are the most widely used MVL circuits, which are based on radix three and four, respectively. CMOS MVL circuits offer many opportunities for the improvement of very-large-scale integration designs [13]. For instance, MVL circuits have matured to the point where quaternary-valued logic have been parts of commercial very-large-scale integration chips since the early 1980s [14]. Moreover, a variety of currentmode and voltage-mode MVL circuits, including arithmetic circuits, memories, threshold detectors, latches, encoders/decoders, and analog-to-digital converters, have been proposed in academic literature [15][16][17][18][19]. Under a low supply voltage, most current-mode MVL circuits have better noise performance compared with their voltage-mode counterparts. On the other hand, current-mode MVL circuits that employ static current mirrors usually have higher power consumption [16].In this paper, we explore energy-efficient and reliable PUF architectures by employing MVL comparators that are optimized for low power consumption and high sensitivity to process variations. To our best knowledge, no PUFs employing MVL circuits have been proposed until now. This paper has the following contributions: M A1 , M A3 M A2 , M A4 M B1 , M B3 M B2 , M B4 M C1 , M C3 M C2 , M C4 are the width of transistors. Figure 5(a) shows the

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Ring oscillator physical unclonable function with multi level supply voltages

Cited by 32 publications

References 4 publications

A Highly Flexible Ring Oscillator PUF

A Highly Flexible Ring Oscillator PUF

A Low-Power Hybrid RO PUF With Improved Thermal Stability for Lightweight Applications

MVL‐PUFs: multiple‐valued logic physical unclonable functions

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