RHBD Bias Circuits Utilizing Sensitive Node Active Charge Cancellation

Abstract

A novel radiation-hardened-by-design (RHBD) technique that utilizes charge sharing to mitigate single-event voltage transients is employed to harden bias circuits. Sensitive node active charge cancellation (SNACC) compensates for injected charge at critical nodes in analog and mixed-signal circuits by combining layout techniques to enhance charge sharing with additional current mirror circuitry. The SNACC technique is verified with a bootstrap current source using simulations in a 90-nm CMOS process. Reductions of approximately 66% in transient amplitude and 62% in transient duration are observed for 60-degree single-event strikes with an LET of 40 MeV*cm 2 /mg.The SNACC technique can be extended to protect multiple sensitive nodes (M-SNACC). M-SNACC is used to harden the bias circuit of a complementary folded cascode operational amplifier, providing a significant reduction in single-event vulnerability for a 8-bit digital-to-analog converter.

A novel high‐precision single‐event transient hardened voltage comparator design

“…Other strategies to mitigate the SET effect are the differential charge cancellation (DCC) 27 technique used in differential input pairs and the sensitive node active charge cancellation (SNACC) 28,29 technique used in operational amplifiers, as illustrated in Figures 2 and 3 deposited charge into the input differential pair of the operational amplifier through the layout design, but it is limited by the distance of the shared charge and depends on the incident angle of the radiation particles. The SNACC technique improves the performance of sensitive nodes against current transient pulse disturbances by designing a feedback loop to detect the SET response and rapidly inject equal opposite charges.…”

“…Other strategies to mitigate the SET effect are the differential charge cancellation (DCC) 27 technique used in differential input pairs and the sensitive node active charge cancellation (SNACC) 28,29 technique used in operational amplifiers, as illustrated in Figures 2 and 3. The DCC technique compensates for the disturbance voltage by sharing the deposited charge into the input differential pair of the operational amplifier through the layout design, but it is limited by the distance of the shared charge and depends on the incident angle of the radiation particles.…”

A 4.5 MGy TID-Tolerant CMOS Bandgap Reference Circuit Using a Dynamic Base Leakage Compensation Technique

“…The concept of using feedback compensation circuits to protect sensitive components in a system is similar to the sensitive node active charge cancellation (SNACC) technique presented in [9]. However, the SNACC technique is useful for single-event mitigation, when the sensitive transistors can be layouted closely in a common-centroid fashion to enable differential charge cancellation [10].…”

A single-event-hardened CMOS operational amplifier design

“…However, the node labeled "Vnp", containing the drains of M28 and M29, is the most sensitive to SE strikes. These two sensitive junctions make this node a prime candidate for the SNACC hardening technique described in [9,10].…”

“…This DCC layout technique has also been extended to harden non-differential circuits [9,10]. A bootstrap current source was hardened using a DCC layout combined with current mirrors to mitigate the effects of a single-event strike, reducing voltage transients.…”