RF CMOS on high-resistivity substrates for system-on-chip applications

Benaissa, K.; Yang, Jau-Yuann; Crenshaw, D.; Williams, B.; Sridhar, S.; Ai, Jian; Boselli, Gianluca; Zhao, Song; Tang, S. C.; Ashburn, S.; Madhani, Pankaj M.; Blythe, T.; Mahalingam, N.; Shichijo, H.

doi:10.1109/ted.2003.810470

Cited by 77 publications

(22 citation statements)

References 30 publications

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“…1(a). And we use two kinds of 500 µm-thick silicon substrates with low resistivity ( sub < 5:0 ohm-cm) and high resistivity ( sub > 1000 ohm-cm), respectively, where the oxide thickness is ∼4.5 µm [18].…”

Section: Spiral Metal Line Widthmentioning

confidence: 99%

Characterization of flexible radio-frequency spiral inductors on a plastic substrate

Qin

Liu

et al. 2016

IEICE Electron. Express

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This paper describes the design and fabrication of flexible radiofrequency inductors integrated on a polyethylene terephthalate substrate. Experimental and modeling results for the RF responses of flexible inductors are reported. Investigations and analysis have been conducted on the effects of layout and process parameters on the frequency responses of inductance, quality factor and self-resonant frequency of the spiral inductors. The influence of bending strain on the performance of spiral inductors is also investigated based on measurement and modeling results. The analysis provides guidelines for designing the flexible spiral inductors towards the flexible monolithic microwave integrated circuits on a plastic substrate. Keywords: characterization, flexible, plastic substrate, quality factor, selfresonant frequency, spiral inductor Classification: Electron devices, circuits and modules References

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Section: Spiral Metal Line Widthmentioning

confidence: 99%

Characterization of flexible radio-frequency spiral inductors on a plastic substrate

Qin

Liu

et al. 2016

IEICE Electron. Express

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“…Furthermore, reducing the substrate losses by spacing the inductor coil away from the substrate may be far less relevant than lowering the ohmic losses in the coil at low RF. That is, because future RF integration processes will likely adopt high-resistivity silicon (HRS) substrates to reduce substrate losses and crosstalk at the same time [15], [16]. Sole reduction of the metal losses may thus be sufficient, if achieved at reduced cost.…”

Section: Sam Concept and Processmentioning

confidence: 99%

Saddle Add-On Metallization for RF-IC Technology

Burghartz

Rejaei

Schellevis

2004

IEEE Trans. Electron Devices

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Abstract-A cost-effective add-on process module for reducing ohmic losses of radio-frequency (RF) inductors and interconnects in RF/BiCMOS and RF/CMOS technologies built on CMOS logic processes is proposed. The module is based on the local thickening of the top metal layer of the thin CMOS interconnects through copper (Cu) electroplating in selected areas. The combination of dense Cu-interconnects in the CMOS logic sections, of thick Cu top-level wiring through local Cu electroplating in the RF sections, and of aluminum (Al) capping of the bond pads provides an optimum tradeoff between packaging requirements, quality of passive components and interconnects, and cost. A special wet-etch process sequence for removal of the Cu-seed and adhesion films from the exposed top metal layer is described. A record quality factor of 13 for a 10-nH inductor on a conventional 5--cm silicon substrate is demonstrated.

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“…Furthermore, the wafer thermal conductivity and the wafer surface cristallinity are well understood. High quality coplanar waveguides (CPWs) on conventional Si or HR-Si substrates have been reported [2]- [10].…”

Section: Introductionmentioning

confidence: 99%

Dielectric Properties Extraction of Coplanar Propagation Waveguides on High Resistivity Silicon Substrates

Lv¹,

Defrance²,

Haddadi³

et al. 2015

Proceedings of the 2015 International Conference on Mechatronics, Electronic, Industrial and Control Engineering

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Abstract-The dielectric properties of coplanar propagation waveguides (CPW) designed and fabricated on high resistivity silicon substrates are investigated. These CPWs exhibited transmission losses around 0.4 dB/mm at 50 GHz. In particular, temperature-dependent measurements show very low deviations. The complex relative permittivity and loss angle tangents are extracted through adequate TEM analytical modeling. It is shown that the results are affected by parasitic peaks that are intrinsically linked with the extraction of the characteristic impedance. To overcome this issue, a numerical resolution is proposed, based on a modelling of the transmission parameter S 21 associated with the implementation of a bidimensionnal Newton-Raphson algorithm for the resolution of the inverse problem. Both methods give nearly identical results in terms of dielectric properties, confirming the validity and complementarity of the analytical and numerical models.

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RF CMOS on high-resistivity substrates for system-on-chip applications

Cited by 77 publications

References 30 publications

Characterization of flexible radio-frequency spiral inductors on a plastic substrate

Characterization of flexible radio-frequency spiral inductors on a plastic substrate

Saddle Add-On Metallization for RF-IC Technology

Dielectric Properties Extraction of Coplanar Propagation Waveguides on High Resistivity Silicon Substrates

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