Revisiting performance of various delay elements to realize a trigger pulse generator

Variation resilient reliable design of trigger pulse generator

“…These delay elements find applications in various important circuits such as TPGs, test pulse generators, microcontrollers, testing of electronic devices and so on [2]. As these circuits have been always a topic of much interest, many authors have analysed different delay elements for a wide range of applications [3, 9–12]. Different delay elements can be found in the literature; however, there is a dire demand for the delay elements that can introduce a very precise and accurate delay in the propagating signal with ultra‐fast rising and falling edges.…”

“…From the literature, it was found that the hybrid m ‐transistor cascaded delay elements (as shown in Fig. 2) emerged as one of the potential delay circuits that can produce trigger pulses of precise duration [3]. Also, this delay element was found to be robust and minimises the adverse effect due to the logic transition of the input signal resulting from the rise and fall time of the signal.…”

“…Though the number of transistors in the delay circuit shown in Fig. 2 are more [12Ts (6 NMOS and 6 PMOS transistors)] compared to the number of transistors required by the transmission gate or cascaded inverter (INV) based delay circuits that require only 2Ts and 4Ts, respectively, the performance of the hybrid m ‐transistors cascaded delay element is found significant in terms of power and delay variability [3]. Furthermore, there is no need for Schmitt trigger circuit in the design to guard against the noise‐induced false switching.…”