Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms

Abstract

Abstract. Techniques for global register allocation via graph coloring have been extensively studied and widely implemented in compiler frameworks. This paper examines a particular variant -the Callahan Koblenz allocator -and compares it to the Chaitin-Briggs graph coloring register allocator. Both algorithms were published in the 1990's, yet the academic literature does not contain an assessment of the Callahan-Koblenz allocator. This paper evaluates and contrasts the allocation decisions made by both algorithms. In particular, we focus on two key differences between the allocators: Spill code: The Callahan-Koblenz allocator attempts to minimize the effect of spill code by using program structure to guide allocation and spill code placement. We evaluate the impact of this strategy on allocated code. Copy elimination: Effective register-to-register copy removal is important for producing good code. The allocators use different techniques to eliminate these copies. We compare the mechanisms and provide insights into the relative performance of the contrasting techniques. The Callahan-Koblenz allocator may potentially insert extra branches as part of the allocation process. We also measure the performance overhead due to these branches.

Register Loading via Linear Programming

“…Let P ′ be the simple path obtained by short-cutting P . Then Constraint (10) ensures the existence of a vertex u in P ′ withx u b = 1. Then such a vertex also exists on P , and choose w to be the last vertex on P withx w b = 1.…”

“…Also, as opposed to most theoretical work, we do not assume any structure (such as low treewidth) for the input graph. Most related to our model are the "spill heuristics" discussed in [6,5,7,29,12,10], but as the name suggests we do not know of any previous approximation algorithms. Here "spill" means putting some variables in the RAM instead of registers and the aim of those heuristics is to minimize the number of variables "spilled".…”

Towards a Java bytecodes compiler for Nios II soft-core processor

“…For both tests, the binary file was generated successfully, as did our register allocation policy, based on Chaittin-Briggs algorithm [9]. The binary files generated by JaNi were tested on a Nios II simulator [15] and produced the expected results.…”

A global progressive register allocator

“…Many improvements have been made to the basic Chaitin allocator to improve spill code generation [10,15,5,6], better address features of irregular architectures [8,9,40], represent register preferences [13,28], and exploit program structure [11,14,32].…”