Research on the Protrusions Near Silicon-Glass Interface during Cavity Fabrication

Abstract

Taking advantage of good hermeticity, tiny parasitic capacitance, batch mode fabrication, and compatibility with multiple bonding techniques, the glass-silicon composite substrate manufactured by the glass reflow process has great potential to achieve 3D wafer-level packaging for high performance. However, the difference in etching characteristics between silicon and glass inevitably leads to the formation of the undesired micro-protrusions near the silicon-glass interface when preparing a shallow cavity etched around a few microns in the composite substrate. The micro-protrusions have a comparable height with the depth of the cavity, which increases the risks of damages to sensitive structures and may even trigger electrical breakdown, resulting in thorough device failure. In this paper, we studied the characteristics of the chemical composition and etching mechanisms at the interface carefully and proposed the corresponding optimized solutions that utilized plasma accumulation at the interface to accelerate etching and bridge the gap in etching rates between different chemical compositions. Finally, a smooth transition of 131.1 nm was achieved at the interface, obtaining an ideal etching cavity surface and experimentally demonstrating the feasibility of our proposal. The micromachining solution is beneficial for improving the yield and structural design flexibility of higher performance micro-electromechanical systems (MEMS) devices.

Research on a capacitive MEMS pressure sensor based on through glass via

“…Then the bonded wafer was then placed in a furnace at a high enough temperature to allow the glass reflow into the silicon trenches. 17 Subsequently, the silicon electrode plates embedded in TGVs were achieved through double-sided polishing process and the silicon plate in TGV was etched to the depth of 2.5 μm to form the microcavity 22 as in Figure 2D.…”

“…Subsequently, the silicon electrode plates embedded in TGVs were achieved through double‐sided polishing process and the silicon plate in TGV was etched to the depth of 2.5 μm to form the microcavity 22 as in Figure 2D.…”

A Novel Fabrication Method for a Capacitive MEMS Accelerometer Based on Glass–Silicon Composite Wafers

“…Vertical interconnection techniques can reduce parasitic capacitance and power consumption due to shorter interconnection lengths [10] and improve the integrated level and space efficiency [11]. To solve the above problems, a composite wafer was presented to complete vertical interconnection [12][13][14]. The composite wafer was first reported by VTI company in 2001, and is [12] used for packaging sandwich-type accelerometers and also used for packaging butterfly-type gyroscopes, as reported by the Sensonor company in 2010 [13].…”

“…To solve the above problems, a composite wafer was presented to complete vertical interconnection [ 12 , 13 , 14 ]. The composite wafer was first reported by VTI company in 2001, and is [ 12 ] used for packaging sandwich-type accelerometers and also used for packaging butterfly-type gyroscopes, as reported by the Sensonor company in 2010 [ 13 ].…”

“…The composite wafer was first reported by VTI company in 2001, and is [ 12 ] used for packaging sandwich-type accelerometers and also used for packaging butterfly-type gyroscopes, as reported by the Sensonor company in 2010 [ 13 ]. In 2018, Meng Zhang et al proposed a 3D packaging technology based on a composite wafer [ 14 ]. The composite substrate with through-silicon via (TSV) is used as the encapsulation cap fabricated by a glass-in-silicon (GIS) reflow process.…”