Research on Key Process Technology of RDL-first Fan-out Wafer Level Packaging

Zhu, Jiachang; Xin, Ming; Yao, Xin

doi:10.1109/icept.2018.8480571

Cited by 2 publications

(1 citation statement)

References 6 publications

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“…Fan-out wafer-level packaging (FOWLP), an advanced packaging technology developed in recent years, eliminates the lap wire and flip chip bumps in traditional packaging structures and replaces the traditional PCB substrate with the redistribution layer (RDL). It has the advantages of high integration, high bandwidth, and short interconnection and is gradually developing into the mainstream technology of packaging [ 4 , 5 , 6 , 7 ]. On the other hand, FOWLP faces many critical issues to be solved in terms of reliability, such as multilayer-interconnect migration, large residual stresses, bump voids, bonding failures, and other failure behaviors.…”

Section: Introductionmentioning

confidence: 99%

Three-Dimensional Integrated Fan-Out Wafer-Level Package Micro-Bump Electromigration Study

Tian

Gu²,

et al. 2023

Micromachines

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To meet the demands for miniaturization and multi-functional and high-performance electronics applications, the semiconductor industry has shifted its packaging approach to multi-chip vertical stacking. Among the advanced packaging technologies for high-density interconnects, the most persistent factor affecting their reliability is the electromigration (EM) problem on the micro-bump. The operating temperature and the operating current density are the main factors affecting the EM phenomenon. Therefore, when a micro-bump structure is in the electrothermal environment, the EM failure mechanism of the high-density integrated packaging structure must be studied. To investigate the relationship between loading conditions and EM failure time in micro-bump structures, this study established an equivalent model of the vertical stacking structure of fan-out wafer-level packages. Then, the electrothermal interaction theory was used to carry out numerical simulations in an electrothermal environment. Finally, the MTTF equation was invoked, with Sn63Pb37 as the bump material, and the relationship between the operating environment and EM lifetime was investigated. The results showed that the current aggregation was the location where the bump structure was most susceptible to EM failure. The accelerating effect of the temperature on the EM failure time was more obvious at a current density of 3.5 A/cm2, which was 27.51% shorter than 4.5 A/cm2 at the same temperature difference. When the current density exceeded 4.5 A/cm2, the change in the failure time was not obvious, and the maximum critical value of the micro-bump failure was 4 A/cm2~4.5 A/cm2.

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Section: Introductionmentioning

confidence: 99%