Abstract:Abstract-Prototyping large SoCs (Systems on Chip) using multiple FPGAs introduces a risk of errors on inter-FPGA links. This raises the question of how we can prove the correctness of a SoC prototyped using multiple FPGAs. We propose using high-speed serial interconnect between FPGAs, with a transparent error detection and correction protocol working on a link-by-link basis. Our inter-FPGA interconnect has an interface that resembles that of a network-on-chip, providing a consistent interface to a prototype So… Show more
“…HTP's comes in different frequency and in different signal groups as shown in Figure 3 [9]. Electrically, HTP works on LVDS ranges that provides power management for different voltage configurations.…”
Section: Hyper Transport Protocols (Htp's)mentioning
“…HTP's comes in different frequency and in different signal groups as shown in Figure 3 [9]. Electrically, HTP works on LVDS ranges that provides power management for different voltage configurations.…”
Section: Hyper Transport Protocols (Htp's)mentioning
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