Reliable on-chip systems in the nano-era

Henkel, Jörg; Bauer, Lars; Dutt, Nikil; Gupta, Puneet; Nassif, Sani R.; Shafique, Muhammad; Tahoori, Mehdi B.; Wehn, Norbert

doi:10.1145/2463209.2488857

Cited by 164 publications

(96 citation statements)

References 78 publications

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“…Reliability is an important concern related to task mapping, tightly connected to the workload distribution [9][10] [11]. Load imbalance decisions can generate hotspots zones (i.e.…”

Section: A C C E P T E D Mmentioning

confidence: 99%

“…The first loop (lines 4-9) analyzes all clusters that have available resources to map the application, selecting the one with the smallest accumulated energy. If there are no clusters with available resources to map the application, a cluster with the smallest accumulated energy is selected, regardless the number of available resources (lines [11][12][13][14][15][16]. Note that the application is mapped in the MPSoC iff the system has available resources for the application.…”

Section: Cluster Selectionmentioning

confidence: 99%

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Hierarchical energy monitoring for task mapping in many-core systems

Castilhos

Mandelli

Ost

et al. 2016

Journal of Systems Architecture

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Highlights• Executed at runtime. The proposed approach can better manage time-varying workloads and system changes.• Hierarchical mapping approach. The proposed approach is implemented in a many-core managed in a hierarchical way. Such hierarchical system management improves system scalability by dividing the system into regions, each one with a manager responsible for actions inside it. Further, it reduces mapping decision computational effort, not compromising the system performance.• Induces to a better system reliability. The proposed approach aims to improve energy balancing, which are directly related to a better system reliability.• Hierarchical energy monitoring. The proposed approach does not employ physical sensors in the mapping decision, which increases area and energy costs. The energy data is obtained at runtime using a hierarchical monitoring approach.• Clock-cycle model for validation. The proposed mapping approach is validated in a large many-core system (up to 256 processing elements), modeled in SystemC. ACCEPTED MANUSCRIPT A C C E P T E D M A N U S C R I P T

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“…Reliability is an important concern related to task mapping, tightly connected to the workload distribution [9][10] [11]. Load imbalance decisions can generate hotspots zones (i.e.…”

Section: A C C E P T E D Mmentioning

confidence: 99%

Section: Cluster Selectionmentioning

confidence: 99%

Hierarchical energy monitoring for task mapping in many-core systems

Castilhos

Mandelli

Ost

et al. 2016

Journal of Systems Architecture

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“…Additionally, due to the continuing increase in semiconductor density, the current soft error challenges experienced in space will also occur in future terrestrial devices. [11] [8].…”

Section: Fpga Device Faults Due To Soft-errorsmentioning

confidence: 99%

StitchUp

Fleming

Thomas

2016

Proceedings of the 53rd Annual Design Automation Conference

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Soft-error detection in FPGAs typically requires replication, doubling the required area. We propose an approach which distinguishes between tolerable errors in data-flow, suchas arithmetic, and intolerable errors in control-flow, such as branches and their data-dependencies. This approach is demonstrated in a new high-level synthesis compiler pass called StitchUp, which precisely identifies the control critical parts of the design, then automatically replicates only that part. We applied StitchUp to the CHStone benchmark suite and performed exhaustive hardware fault injection in each case, finding that all control-flow errors were detected while only requiring 1% circuit area overhead in the best case.

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“…Researchers have done experiments on systems with hard to quantify fault characteristics, such as undervolted and overclocked hardware, and found them hard to model or quantify [16,19,25]. In industry, hardware component manufacturers sacrifice some performance, die space and energy into error correction hardware to reduce the effects of manufacturing defects [13]. These difficult to model pieces of hardware are good targets for Topaz.…”

Section: Related Workmentioning

confidence: 99%

Approximate computation with outlier detection in Topaz

Achour

Rinard

2015

SIGPLAN Not.

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We present Topaz, a new task-based language for computations that execute on approximate computing platforms that may occasionally produce arbitrarily inaccurate results. Topaz maps tasks onto the approximate hardware and integrates the generated results into the main computation. To prevent unacceptably inaccurate task results from corrupting the main computation, Topaz deploys a novel outlier detection mechanism that recognizes and precisely reexecutes outlier tasks. Outlier detection enables Topaz to work effectively with approximate hardware platforms that have complex fault characteristics, including platforms with bit pattern dependent faults (in which the presence of faults may depend on values stored in adjacent memory cells). Our experimental results show that, for our set of benchmark applications, outlier detection enables Topaz to deliver acceptably accurate results (less than 1% error) on our target approximate hardware platforms. Depending on the application and the hardware platform, the overall energy savings range from 5 to 13 percent. Without outlier detection, only one of the applications produces acceptably accurate results.

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Reliable on-chip systems in the nano-era

Cited by 164 publications

References 78 publications

Hierarchical energy monitoring for task mapping in many-core systems

Hierarchical energy monitoring for task mapping in many-core systems

StitchUp

Approximate computation with outlier detection in Topaz

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