Hierarchical energy monitoring for task mapping in many-core systems

Castilhos, Guilherme; Mandelli, Marcelo; Ost, Luciano; Moraes, Fernando

doi:10.1016/j.sysarc.2016.01.005

Cited by 13 publications

(2 citation statements)

References 26 publications

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“…To avoid chip damage, its maximum surface temperature should not exceed a threshold value. Depending on the chip manufacturer, the range of the temperature threshold values is 85-105 • C (e.g., see [12][13][14]71,72] for more details). The results presented in this sub-section were obtained for the case of the TEC and TEG having P-/N-leg height (h TE ) of 24 µm.…”

Section: Operation Principles Of Sscfmentioning

confidence: 99%

Sustainable Self-Cooling Framework for Cooling Computer Chip Hotspots Using Thermoelectric Modules

2021

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The heat generation from recent advanced computer chips is increasing rapidly. This creates a challenge in cooling the chips while maintaining their temperatures below the threshold values. Another challenge is that the heat generation in the chip is not uniform where some chip components generate more heat than other components. This would create a large temperature gradient across the chip, resulting in inducing thermal stresses inside the chip that may lead to a high probability to damage the chip. The locations in the chip with heat rates that correspond to high heat fluxes are known as hotspots. This research study focuses on using thermoelectric modules (TEMs) for cooling chip hotspots of different heat fluxes. When a TEM is used for cooling a chip hotspot, it is called a thermoelectric cooler (TEC), which requires electrical power. Additionally, when a TEM is used for converting a chip’s wasted heat to electrical power, it is called a thermoelectric generator (TEG). In this study, the TEMs are used for cooling the hotspots of computer chips, and a TEC is attached to the hotspot to reduce its temperature to an acceptable value. On the other hand, the other cold surfaces of the chip are attached to TEGs for harvesting electrical power from the chip’s wasted heat. Thereafter, this harvested electrical power (HEP) is then used to run the TEC attached to the hotspot. Since no external electrical power is needed for cooling the hotspot to an acceptable temperature, this technique is called a sustainable self-cooling framework (SSCF). In this paper, the operation principles of the SSCF to cool the hotspot, subjected to different operating conditions, are discussed. As well, considerations are given to investigate the effect of the TEM geometrical parameters, such as the P-/N-leg height and spacing between the legs in both operations of the TEC mode and TEG mode on the SSCF performance.

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Section: Operation Principles Of Sscfmentioning

confidence: 99%

Sustainable Self-Cooling Framework for Cooling Computer Chip Hotspots Using Thermoelectric Modules

2021

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“…In large systems, the major concerns are scalability, dynamic workload and reliability. To make sure about the scalability, distribution of the mapping decision through the system is needed (Castilhos et al, 2016). As a quadratic assignment problem, the mapping is known as NP-hard problem (Sepúlveda et al, 2012).…”

Section: Introductionmentioning

confidence: 99%

Tasks mapping in the network on a chip using an improved optimization algorithm

Darbandi¹,

Ramtin

Sharafi

2020

IJPCC

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Purpose A set of routers that are connected over communication channels can from network-on-chip (NoC). High performance, scalability, modularity and the ability to parallel the structure of the communications are some of its advantages. Because of the growing number of cores of NoC, their arrangement has got more valuable. The mapping action is done based on assigning different functional units to different nodes on the NoC, and the way it is done contains a significant effect on implementation and network power utilization. The NoC mapping issue is one of the NP-hard problems. Therefore, for achieving optimal or near-optimal answers, meta-heuristic algorithms are the perfect choices. The purpose of this paper is to design a novel procedure for mapping process cores for reducing communication delays and cost parameters. A multi-objective particle swarm optimization algorithm standing on crowding distance (MOPSO-CD) has been used for this purpose. Design/methodology/approach In the proposed approach, in which the two-dimensional mesh topology has been used as base construction, the mapping operation is divided into two stages as follows: allocating the tasks to suitable cores of intellectual property; and plotting the map of these cores in a specific tile on the platform of NoC. Findings The proposed method has dramatically improved the related problems and limitations of meta-heuristic algorithms. This algorithm performs better than the particle swarm optimization (PSO) and genetic algorithm in convergence to the Pareto, producing a proficiently divided collection of solving ways and the computational time. The results of the simulation also show that the delay parameter of the proposed method is 1.1 per cent better than the genetic algorithm and 0.5 per cent better than the PSO algorithm. Also, in the communication cost parameter, the proposed method has 2.7 per cent better action than a genetic algorithm and 0.16 per cent better action than the PSO algorithm. Originality/value As yet, the MOPSO-CD algorithm has not been used for solving the task mapping issue in the NoC.

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Cooling Computer Chips with Cascaded and Non-cascaded Thermoelectric Devices

Al-Shehri

2019

Arab J Sci Eng

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Hierarchical energy monitoring for task mapping in many-core systems

Cited by 13 publications

References 26 publications

Sustainable Self-Cooling Framework for Cooling Computer Chip Hotspots Using Thermoelectric Modules

Sustainable Self-Cooling Framework for Cooling Computer Chip Hotspots Using Thermoelectric Modules

Tasks mapping in the network on a chip using an improved optimization algorithm

Cooling Computer Chips with Cascaded and Non-cascaded Thermoelectric Devices

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