Reliability challenges for copper interconnects

Li, Baozhen; Sullivan, Timothy D.; Lee, Tom C.; Badami, D.

doi:10.1016/j.microrel.2003.11.004

Cited by 252 publications

(149 citation statements)

References 32 publications

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“…current), and can be viewed as the self-diffusion of metallic ions in response to an electric field. 84,85 The flux of metal atoms created by the electron wind force is balanced by a back stress that pushes the metal atoms in the opposite direction of the current. An imbalance in these two opposing forces can result in the formation of voids or extrusions that at critical sites in the metal line can result in failure of the metal interconnect.…”

Section: 318mentioning

confidence: 99%

“…319,320 However for Cu, the top surface has been identified as the fastest self diffusion path, 321 and numerous studies have identified the DB/Cu interface as the dominate electromigration path in low-k/Cu interconnects. [84][85][86][87][88]322 For this reason, the DB in a low-k/Cu interconnect also serves as a Cu surface capping layer to passivate the top Cu surface and reduce Cu surface diffusion contributing to electromigration. 322 This implies a need for strong bonding between the DB and Cu to both minimize Cu surface diffusion and to withstand the back stresses produced by electromigration.…”

Section: 318mentioning

confidence: 99%

See 1 more Smart Citation

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

King

2014

ECS J. Solid State Sci. Technol.

131

115

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Over the past decade, the primary focus for improving the performance of nano-electronic metal interconnect structures has been to reduce the impact of resistance-capacitance (RC) delays via utilizing insulating dielectrics with ever lower values of dielectric permittivity. The integration and implementation of such low dielectric constant (i.e. low-k) materials has been fraught with numerous challenges. For intermetal and interlayer (ILD) low-k dielectrics, these challenges have been largely associated to integration with metal interconnect fabrication processes and well documented and reviewed in the literature. Although equally important, less attention has been given to other low-k dielectrics utilized in metal interconnect structures that are commonly referred to as low-k dielectric barriers (DB), etch stops (ES), and/or Cu capping layers (CCL). These materials present numerous challenges as well for integration into metal interconnect fabrication processes. However, they also have more stringent integrated functionality requirements relative to low-k ILD materials that serve only a basic purpose of electrically isolating adjacent metal lines. In this article, we review the integration challenges and associated integrated functionality requirements for low-k DB/ES/CCL materials with a focus on the current status and future direction needed for these materials to facilitate both Moore's law (i.e. More Moore) and More than Moore scaling.

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Section: 318mentioning

confidence: 99%

Section: 318mentioning

confidence: 99%

Dielectric Barrier, Etch Stop, and Metal Capping Materials for State of the Art and beyond Metal Interconnects

King

2014

ECS J. Solid State Sci. Technol.

131

115

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“…Copper (Cu) has replaced aluminium (Al) as the interconnect metal of choice in current IC production due to the benefits of lower resistivity, reduced RC time delay, decreased power consumption and increased resistance to electromigration failure [2]. With the advantages due to the change to Cu also came a number of disadvantages, most notably the diffusion of Cu into any surrounding silicon based inter layer dielectric (ILD) materials, which causes device degradation and ultimately device failure [3] [4].…”

Section: Introductionmentioning

confidence: 99%

Chemical and electrical characterisation of the segregation of Al from a CuAl alloy (90%:10% wt) with thermal anneal

et al. 2016

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A copper-aluminium (CuAl) alloy (90% : 10% wt) has been investigated in relation to segregation of the alloying element Al, from the alloy bulk during vacuum anneal treatments.X-ray photoelectron spectroscopy (XPS) measurements were used to track the surface enrichment of Al segregating from the alloy bulk during in situ ultra-high vacuum anneals. indicates that the segregation of Al from the alloy bulk following thermal annealing results in a decrease in film resistivity. X-ray diffraction data shows evidence for significant changes in crystal structure upon annealing, providing further evidence for expulsion of Al from the alloy bulk.

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“…To reduce the RC delay, materials with lower electrical resistance and lower dielectric constant are needed. Copper is replacing aluminium as interconnect metallization [2] for all the advanced integrated circuit. On the other side, recently, some low-κ materials are introduced in electronic devices as insulator in substitutions to SiO 2 .…”

Section: Introductionmentioning

confidence: 99%