Reliability and hardware implementation of rank modulation flash memory

Abstract

Abstract-We review a novel data representation scheme for NAND flash memory named rank modulation (RM), and discuss its hardware implementation. We show that under the normal threshold voltage (Vth ) variations, RM has intrinsic read reliability advantage over conventional multiple-level cells. Test results demonstrating superior reliability using commercial flash chips are reviewed and discussed. We then present a read method based on relative sensing time, which can obtain the rank of all cells in the group in one read cycle. The improvement in reliability and read speed enable similar program-and-verify time in RM as that of conventional MLC flash.

Topologically Defined Flash Memory

“…2. Programming by relative ranking, similar to that for programming an RM memory [7,8]. For the MLC example, starting with an erased distribution of "11" cells, we program all the "01" cells using incremental pulse until have cells have a longer sensing time than that of the top most "11" cells; we then program all the "00" cells so that all have longer than sensing time than all the "01" cells, etc.…”