Reduction of threading dislocation density in InP-on-Si heteroepitaxy with strained short-period superlattices

Abstract

We applied multistrained short-period superlattices (SSPSs) and GaP buffer layers to the InP-on-Si heteroepitaxy, in order to suppress the generation of threading dislocations. As a result, it was found that the density of threading dislocations in an InP/SSPSs/GaAs/SSPSs/GaP/Si structure including (InAs)m(GaAs)n SSPSs and (GaAs)i(GaP)j SSPSs was remarkably reduced, compared with that in the InP/GaP/Si structure. Misfit dislocations lying along the 〈011〉 directions were observed at heterointerfaces in the InP/SSPSs/GaAs/SSPSs/GaP/Si structure. Therefore, the lattice mismatch strain was stepwise accommodated by the generation of misfit dislocations at the heterointerfaces. From these results, it was clarified that multi-SSPSs are effective for reducing the density of threading dislocations in heteroepitaxy with a large lattice mismatch.

Heteroepitaxial growth of GaAs on Si by MOVPE using a-GaAs/a-Si double-buffer layers

“…Otherwise, the influence of dislocation density on the performance of the GaAs-on-Si solar cell has been theoretically analyzed [3], suggesting that the dislocation density of GaAs on Si must be lower than 5 Â 10 5 cm À2 to yield an energy conversion efficiency that is equivalent to those of GaAs-on-GaAs and InP-on-InP solar cells. Numerous approaches, including two-step growth [4][5][6][7], thermal cycle annealing [8], strained-layer superlattices [9][10][11][12], strained short-period superlattices [13,14] or graded InGaAs single interlayer [15] have been reported to yield the dislocation density of GaAs on Si as low as 10 5 cm À2 . In particular, a special growth technique of epitaxial lateral overgrowth combining molecular beam epitaxy or metal-organic vapor phase epitaxy (MOVPE) with liquid-phase epitaxy was even possibly to achieve a GaAs epilayer free of dislocations [16,17].…”

MBE growth of GaAsN/GaP(N) quantum wells with abrupt heterointerfaces for photonics applications on Si substrates

“…However, structural defects such as threading dislocations and stacking faults were generated inside the III-V device layers grown on Si (generally with a density of 10 5 -10 7 cm À2 ) due to the large latticemismatch and difference of the thermal expansion coefficients between the III-V compounds and Si (lattice-mismatch f=4% for GaAs and f=8% for InP). This could not be prevented by using either a step-wise or a graded and thick buffer layer between the III-V device layers and the Si substrates [6,7]. In fact, as strain is relaxed in the buffer layer, a great number of misfit dislocations will lie at the heterointerfaces and thus threading dislocations will also be generated by the reaction between the misfit dislocations at the heterointerfaces and those in the buffer layer [8].…”

“…These XTEM images were taken along the[1][2][3][4][5][6][7][8][9][10] direction under the g 220 diffraction condition.…”

Physical Properties and Characteristics of III-V Lasers on Silicon

“…However, the active region and injection path can be isolated from the defects through precise strain management, which causes the bending and subsequent annihilation of threading dislocations. Several approaches have been demonstrated, including III-Sb buffer layers [23], strained Stranski-Krastanow quantum dot layers [24], graded Si-Ge buffer layers [25] and strained super-lattices (SSL) [26].…”