Reduction of layout complexity for shorter mask write-time

Hannon, Sean; Lewis, Travis; Goad, Scott; Jantzen, Kenneth; Wang, Jianlin; Vu, Hien Thi Thu; Sahouria, Emile; Schulze, Steffen

doi:10.1117/12.746986

Cited by 2 publications

(2 citation statements)

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“…[4] SMO Table 3: Assessment of the trade-off between shout count and mask EPE for various global solution approaches. [8] Figure 11: Shot count reduction example for different global optimization solutions [7] Figure 12: EPE and process window measurements for different global optimization solutions. figure 4 a wafer verification step is added to the main mask writer flow.…”

Section: Discussionmentioning

confidence: 99%

“…In this case any changes to the output layout are intrinsically verified against the tolerances required by the litho process. The OPC tools referenced in this study (Calibre OPCpro and Calibre nmOPC) offer two main usercontrolled options to reduce shot count [8,9] : 1. Jog-smoothing -the alignment of adjacent fragments to eliminate vertices prior to the final iterations 2.…”

Section: Optimized Opc Outputmentioning

confidence: 99%

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Mask write time reduction: deployment of advanced approaches and their impact on established work models

et al. 2012

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The extension of 193nm exposure wavelength to smaller nodes continues the trend of increased data complexity and subsequently longer mask writing times. In particular inverse lithography methods create complex mask shapes. We introduce a variety of techniques to mitigate the impact -data simplification post-optical proximity correction (OPC), LShots, multi-resolution writing (MRW) and optimization based fracture. Their potential for shot count reduction is assessed. All of these techniques require changes to the mask making work flow at some level -the data preparation and verification flow, the mask writing equipment, the mask inspection and the mask qualification in the wafer manufacturing line. The paper will discuss these factors and conduct a benefit -effort assessment for the deployment. Some of the techniques do not reproduce the originally targeted mask shape. The impact of the deviations will be studied at wafer level with simulations of the exposure process and quantified as to their impact on the exposure process window. Based on the results of the assessment a deployment strategy will be discussed.

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Section: Discussionmentioning

confidence: 99%

Section: Optimized Opc Outputmentioning

confidence: 99%