Reducing offset errors in MITE systems by precise floating gate programming

Schlottmann, Craig; Degnan, Brian; Abramson, David; Hasler, P.

doi:10.1109/iscas.2010.5537246

Cited by 2 publications

(3 citation statements)

References 13 publications

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“…The STLS are modified EEPROM devices, fabricated in a standard CMOS process, that simultaneously provide long-term storage (non-volatile), computation, and adaptation in a single device. The development of Large-Scale Field Programmable Analog Arrays (FPAA) enabled configuration to be used for physically based neuromorphic techniques (Twigg et al, 2007; Basu et al, 2010a,b; Schlottmann et al, 2010, 2012a,b, c; Wunderlich et al, 2012). These approaches allow the added advantage of those building applications not to have expertise in IC design, a separation that should prove useful for the neuromorphic community as well.…”

Section: Large-scale Neuromorphic Systemsmentioning

confidence: 99%

Finding a roadmap to achieve large neuromorphic hardware systems

2013

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Neuromorphic systems are gaining increasing importance in an era where CMOS digital computing techniques are reaching physical limits. These silicon systems mimic extremely energy efficient neural computing structures, potentially both for solving engineering applications as well as understanding neural computation. Toward this end, the authors provide a glimpse at what the technology evolution roadmap looks like for these systems so that Neuromorphic engineers may gain the same benefit of anticipation and foresight that IC designers gained from Moore's law many years ago. Scaling of energy efficiency, performance, and size will be discussed as well as how the implementation and application space of Neuromorphic systems are expected to evolve over time.

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Section: Large-scale Neuromorphic Systemsmentioning

confidence: 99%

Finding a roadmap to achieve large neuromorphic hardware systems

2013

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“…Historically, gain errors induced by charge mismatch between devices have had a crippling affect on large-scale MITE systems [14]. In order for the MITE to be compatible with the FPAA programming core, we have developed a specialized MITE structure as described in [15]. Of particular importance, the use of this on-chip programming core comes at no additional overhead as it is already built in to program the floating-gate switches [16].…”

Section: Multiple Input Translinear Elementsmentioning

confidence: 99%

“…To correct this, the output signal will be fed back to produce an equation that results in the intended output. An example of this process is shown here (15) Once functions capable of being implemented with the MITEs are obtained, previous work can be leveraged to map the functions onto a MCE. As described in [13], the fixed gate connections of the 5 input MITEs contained in each MCE produces a set pattern in the exponents of the expression implemented.…”

Section: A Network Synthesismentioning

confidence: 99%

A MITE-Based Translinear FPAA

Schlottmann

Abramson

Hasler

2012

IEEE Trans. VLSI Syst.

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While the development of reconfigurable analog platforms is a blossoming field, the tradeoff between usability and flexibility continues to be a major barrier. Field Programmable Analog Arrays (FPAAs) built with translinear elements offer a promising solution to this problem. These FPAAs can be built to use previously developed synthesis procedures for translinear circuits. Furthermore, large-scale translinear FPAAs can be built using floating-gate transistors as both the computational elements and the reconfigurable interconnect network. An FPAA built using Multiple Input Translinear Elements (MITEs) has been designed, fabricated in 0.35 m CMOS, and tested. These devices have been programmed to implement various circuits including multipliers, squaring circuits, RMS-to-DC converters, and filters. In addition, synthesis, place-and-route, and programming tools have been created in order to implement a reconfigurable system where the circuits implemented are described only by equations. The continued development of translinear FPAAs will lead to a reconfigurable analog system that allows for a large portion of the design to be abstracted away from the user.

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Reducing offset errors in MITE systems by precise floating gate programming

Cited by 2 publications

References 13 publications

Finding a roadmap to achieve large neuromorphic hardware systems

Finding a roadmap to achieve large neuromorphic hardware systems

A MITE-Based Translinear FPAA

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