2016 IEEE International Electron Devices Meeting (IEDM) 2016
DOI: 10.1109/iedm.2016.7838352
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Record low metal — (CVD) graphene contact resistance using atomic orbital overlap engineering

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Cited by 27 publications
(20 citation statements)
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References 11 publications
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“…In this work, we investigate systematically the influence of size and density of round holes in graphene under Au contact metal, and the influence of the resulting hole‐to‐graphene ratio. In contrast to previous studies, where understanding of the trade‐off between the beneficial role of the edge contacts and the prejudicial impact of the etched graphene was limited to a qualitative perspective, we provide deeper insights into optimal contact configurations studying patterns of holes with varying diameter down to 50 nm. In addition, we analyze the impact of a varying charge carrier concentration in the graphene under the contact and rationalize the phenomenon of improvement in current injection associated with patterning by first‐principles‐based simulations.…”
Section: Introductionmentioning
confidence: 92%
“…In this work, we investigate systematically the influence of size and density of round holes in graphene under Au contact metal, and the influence of the resulting hole‐to‐graphene ratio. In contrast to previous studies, where understanding of the trade‐off between the beneficial role of the edge contacts and the prejudicial impact of the etched graphene was limited to a qualitative perspective, we provide deeper insights into optimal contact configurations studying patterns of holes with varying diameter down to 50 nm. In addition, we analyze the impact of a varying charge carrier concentration in the graphene under the contact and rationalize the phenomenon of improvement in current injection associated with patterning by first‐principles‐based simulations.…”
Section: Introductionmentioning
confidence: 92%
“…[5][6][7][8] After more than a decade of studies, contact resistance is still now regarded as one of the bottlenecks for realizing high-performance GFETs: [5][6][7][8] although ultra-low contact resistance (< 100 Ω·µm) has been achieved by top-and edge-contact strategies (see Figure 1a), it is mostly limited within a small area so far, with the contact pattern necessarily defined by either electron-beam lithography (EBL) or delicate ozone/ion beam treatment for a clean contact interface (see Table S1). [9][10][11][12][13][14][15][16] Such bottlenecks have to be overcome in order to achieve large scale processing, productization and further applications of high-performance GFETs.…”
Section: The Majority Of the Fabricated Devices Show Contact Resistanmentioning
confidence: 99%
“…By contrast, in Ref 18 , a much increased contact height of 100 nm was used, but the contact length was fixed at 10 µm and the effect of varying this latter parameter was not investigated. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 11,12,15,26,36 blue squares, data from refs; 14,16 red triangles, data from refs; 6,7,9,10,28,37 red circles, data from ref; 27 green circles, data from refs; 8,18,23 earthy yellow diamond, data from ref. 26 In this work, we systematically explored the influence of the contact geometry in a bottom contact device by adjusting the contact height and length (denoted as ConH and ConL, referring to the height and the length of the contact electrodes) between 1.8 nm-80 nm and 10 µm-30 µm, respectively.…”
Section: Electrical Characterization Of Vdw Contacted Gfet On Rigid Smentioning
confidence: 99%
“…For instance, R C largely degrades the output conductance and the maximum oscillation frequency of graphene-FETs (GFETs) [1], [3]. Thus, to boost the graphene technology, design strategies to optimize R C are urgently required to make graphene a viable solution for high performance electronic devices [4].…”
Section: Introductionmentioning
confidence: 99%