Reconfigurable Turbo Decoder With Parallel Architecture for 3GPP LTE System

High performance parallel turbo decoder with configurable interleaving network for LTE application

“…Hence, a low-cost and flexible interleaving network supporting multi-parallelism is very necessary. A multistage architecture with low complexity [17] is proposed, but it does not provide approaches to support multi-parallelism. In addition, optimized address generators are proposed to reduce complexity in [18,19].…”

“…Nevertheless, since they need to be expanded to support multi-parallelism, the architecture costs large area. Moreover, based on the multistage network, [17] proposed a path metric initialization method to improve the performance loss in high parallelism, whose performance is inferior to that of serial decoding. Furthermore, since the sub-block size (block size divided by the levels of parallelism) in LTE standard cannot be divided evenly by 2, radix-4 decoding cannot be supported, which may decrease the throughput.…”

“…This network can be flexibly extended to support arbitrary contention-free interleavers by appending an additional network. Then the robust path metric initialization method in [17] is extended to further improve the performance loss of parallel decoding. Based on the proposed interleaving network and optimized decoding algorithm, a parallel architecture is designed for LTE turbo decoder supporting all block sizes range from 40 to 6144.…”

“…Based on the proposed interleaving network and optimized decoding algorithm, a parallel architecture is designed for LTE turbo decoder supporting all block sizes range from 40 to 6144. As stated in [17], since P¼ 8 is the common factor of all 188 block sizes, this proposed parallel architecture can be configured to process one codeword by one, two, four or eight SISO decoders. Moreover, configurable memory architecture is proposed to avoid memory access contention and a dual-mode add-compare-select (ACS) unit is introduced to support both radix-2 and radix-4 processing.…”

Dynamic configuration management of a multi-standard and multi-mode reconfigurable multi-ASIP architecture for turbo decoding

“…The introduction of contention-free interleavers in recent communication standards, such as long-term evolution (LTE) [2] and Worldwide Interoperability for Microwave Access (WiMAX) [3], enables highthroughput implementations such as presented in [4][5][6][7][8] and [9]. These architectures propose to use multiple soft-input soft-output (SISO) decoders to reach the high throughput requirement of emerging and future standards.…”