Reconfigurable FPGA-Based Channelization Using Polyphase Filter Banks for Quantum Computing Systems

Abstract

Recently proposed quantum systems use frequency multiplexed qubit technology for readout electronics rather than analog circuitry, to increase cost effectiveness of the system. In order to restore individual channels for further processing, these systems require a demultiplexing or channelization approach which can process high data rates with low latency and uses few hardware resources. In this paper, a low latency, adaptable, FPGA-based channelizer using the Polyphase Filter Bank (PFB) signal processing algorithm is presented. As only a single prototype lowpass filter needs to be designed to process all channels, PFBs can be easily adapted to different requirements and further allow for simplified filter design. Due to reutilization of the same filter for each channel they also reduce hardware resource utilization when compared to the traditional Digital Down Conversion approach. The realized system architecture is extensively generic, allowing the user to select from different numbers of channels, sample bit widths and throughput specifications. For a test setup using a 28 coefficient transpose filter and 4 output channels, the proposed architecture yields a throughput of 12.8 Gb/s with a latency of 7 clock cycles.

A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC

“…The delayed polynomials are denoted by H r (Z M ). This formulation maps the one dimensional array of filter coefficients and index markers to a two dimensional array as shown in (4). This mapping is also used in the Cooley-Tukey fast Fourier transform (FFT) and allows the array to be loaded by columns but processed by rows.…”

“…L ARGE data bandwidths are an important theme underpinning the development of new technologies including 5G/6G devices for wireless communications [1], [2], real-time video processing for self-driving cars [3], and microwave device arrays for quantum computing and astronomy [4]- [7]. Digital signal processing systems built on Field-Programmable Gate Arrays (FPGAs) are well-suited to high-performance applications that demand rapid, real-time processing of wide data bandwidths as these devices uniquely offer powerful and highly customizable parallel computing architectures, large I/O bandwidths, and low power consumption.…”

“…This advancement eliminates the need for separate analog devices and infrastructure circuitry reducing power consumption and device footprint around 50% [13], [14]. Consequently, RF-integrated SoC architectures have become the focus of our group working to develop readout schemes for frequency-division-multiplexed microwave resonator detectors and our collaborators and colleagues whose work includes 5G/6G wireless [1], [2], quantum computing [4], [5], and software-defined-radio [15].…”

Low-cost, High-speed Parallel FIR Filters for RFSoC Front-Ends Enabled by CλaSH

“…• Instrumentation applications that demand processing of the full available spectrum, including arrays for radio astronomy [2] and quantum computing readouts [3]. • Custom Digital Up/Down Conversion (DUC/DDC) as a front-end of any radio application.…”