Reconfigurable DSP block design for dynamically reconfigurable architecture

Warrier, Rakesh; Liang, Huixin; Zhang, Wei

doi:10.1109/iscas.2014.6865693

Cited by 3 publications

(4 citation statements)

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“…The current fixed-precision DSP block [11] incorporated in the NATURE architecture is composed of two 16-bit pre-adders, a 16-bit Wallace tree multiplier and a 32-bit ALU unit that can perform addition, subtraction, 16-bit barrel shifting, and bitwise logical operations. The submodules form each stage of the three stage pipeline in the DSP block, which also incorporates multiple output registers to store the final result.…”

Section: Background and Related Workmentioning

confidence: 99%

“…DSP Block Architecture: To make effective use of our fracturable computational path, we have also defined an enhanced DSP block architecture, based on the architecture in [11]. Fig.…”

Section: Background and Related Workmentioning

confidence: 99%

“…The results are shown in Table 1. The Table compares the resource consumption of the proposed DSP architecture against the existing (non-fracturable) DSP block in NATURE [11], which uses a wallace tree multiplier, with a maximum operating frequency of 333 MHz. It can be observed that the proposed DSP architecture, based on the BW multiplier with an HPM reduction tree, incorporates multiple operating modes (as discussed in sec.…”

Section: Area/power Overhead Of Fracturable Dsp Block and Performancementioning

confidence: 99%

“…NATURE employs Temporal Logic Folding (TLF) at a fine-grained level, with distributed nano RAMs that enable reconfiguration of LookUp Tables (LUTs) to be achieved in a few picoseconds, much faster than commercial Field Programmable Gate Arrays (FPGAs). NATURE also supports reconfiguration of coarse-grained DSP blocks [11] and block RAMs (BRAMs) at similar speeds, making high frequency context switches feasible to improve area utilization and energy efficiency. The custom mapping tool, NanoMap [15], maps a circuit netlist to the architecture and generates the context switching controls automatically for each occupied logic element (LUTs, DSPs, and others), which together describe the circuit.…”

Section: Introductionmentioning

confidence: 99%

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Fracturable DSP Block for Multi-context Reconfigurable Architectures

Warrier

Shreejith

Zhang

et al. 2016

Circuits Syst Signal Process

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Multi-context architectures like NATURE enable low-power applications to leverage fast context switching for improved energy efficiency and lower area footprint. The NATURE architecture incorporates 16-bit reconfigurable DSP blocks for accelerating arithmetic computations, however, their fixed precision prevents efficient re-use in mixed-width arithmetic circuits. This paper presents an improved DSP block architecture for NATURE, with native support for temporal folding and run-time fracturability. The proposed DSP block can compute multiple sub-width operations in the same clock cycle and can dynamically switch between sub-width and full-width operations in different cycles. The NanoMap tool for mapping circuits onto NA-TURE is extended to exploit the fracturable multiplier unit incorporated in the DSP block. We demonstrate the efficiency of the proposed dynamically fracturable DSP block by implementing logic-intensive and compute-intensive benchmark applications. Our results illustrate that the fracturable DSP block can achieve a 53.7% reduction in DSP block utilization and a 42.5% reduction in area with a 122.5% reduction in power-delay product without exploiting logic folding. We also observe an average reduction of 6.43% in power-delay product for circuits that utilize NATURE's temporal folding compared to the existing full precision DSP block in NATURE, leading to highly compact, energy efficient designs.

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Section: Background and Related Workmentioning

confidence: 99%

“…DSP Block Architecture: To make effective use of our fracturable computational path, we have also defined an enhanced DSP block architecture, based on the architecture in [11]. Fig.…”

Section: Background and Related Workmentioning

confidence: 99%

Section: Area/power Overhead Of Fracturable Dsp Block and Performancementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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