Realization of low contact resistance close to theoretical limit in graphene transistors

Abstract

Realizing low contact resistance between graphene and metal electrodes remains a well-known challenge for building high-performance graphene devices. In this work, we attempt to reduce the contact resistance in graphene transistors and further explore the resistance limit between graphene and metal contacts. The Pd/graphene contact resistance at room temperature is reduced below the 100 Ω·μm level both on mechanically exfoliated and chemical-vapor-deposition graphene by adopting high-purity palladium and high-quality graphene and controlling the fabrication process to not contaminate the interface. After excluding the parasitic series resistances from the measurement system and electrodes, the retrieved contact resistance is shown to be systematically and statistically less than 100 Ω·μm, with a minimum value of 69 Ω·μm, which is very close to the theoretical limit. Furthermore, the contact resistance shows no clear dependence on temperature in the range of 77-300 K; this is attributed to the saturation of carrier injection efficiency between graphene and Pd owing to the high quality of the graphene samples used, which have a sufficiently long carrier mean-free-path.

Graphene field effect transistors with niobium contacts and asymmetric transfer characteristics

“…We find that gently [5][6][7][8][9]. We distinguish the role of air adsorbates and process residues on the doping of the graphene channel from that of the supporting SiO2 and argue that strain of graphene under the contacts plays an important role in increasing the contact resistance.…”

Electron-phonon cooling in large monolayer graphene devices

“…We deposit a Pd/Al bilayer with thicknesses 5 nm/50 nm to contact the graphene. Palladium is used to form Ohmic contact to the graphene [22,23] and aluminum was used to realize superconducting contacts with a T c ≈ 1.2 K. Superconducting contacts were desired to suppress the out-diffusion of hot electrons, another potential source of thermal conductance to the bath.…”

Electrical devices from top-down structured platinum diselenide films

“…[5] Contact resistivity in graphene devices has been widely studied and a wide range of contact resistances (~10 2 to ~10 3 Ω•µm) has been reported, depending on the contact metal, surface states and contact geometry. [6][7][8][9] Following the impressive advances in graphene, various layered 2D TMDs have been tested in a wide range of device applications, including field effect transistors (FETs), [10,11] photodetectors [12][13][14] and sensors. [15,16] Up to now, molybdenum and/or tungsten based materials have been the main focus of 2D TMD research, and the majority of studies on electrical contacts to 2D TMDs have concentrated on these materials.…”