2006 Canadian Conference on Electrical and Computer Engineering 2006
DOI: 10.1109/ccece.2006.277356
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Real-Time Simulation of Power Electronics in Power Systems using an FPGA

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Cited by 15 publications
(5 citation statements)
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“…State space node method. Since it is possible to observe the amount of electricity that cannot be measured in a live power system due to technical requirements, the simulation results are helpful to analyze the impact of the transient (abnormal) state of the power system operation and also provide valuable data [10] . If you want to use a computer to realize system simulation, it is necessary to convert a continuous model to a discrete model.…”
Section: Power System Basic Simulation Algorithm and Component Modeli...mentioning
confidence: 99%
“…State space node method. Since it is possible to observe the amount of electricity that cannot be measured in a live power system due to technical requirements, the simulation results are helpful to analyze the impact of the transient (abnormal) state of the power system operation and also provide valuable data [10] . If you want to use a computer to realize system simulation, it is necessary to convert a continuous model to a discrete model.…”
Section: Power System Basic Simulation Algorithm and Component Modeli...mentioning
confidence: 99%
“…The currents i 1 and i 2 are given in (15) and (16), respectively. This set of equations are the interaction of the currents in the inductor network and are called XFRM i :…”
Section: Switching Functions Model For a Dibbcmentioning
confidence: 99%
“…In [12] the average value method was used to calculate the output value of a three-phase interleaved converter. In [3,[13][14][15][16][17][18][19], equations are used in the state space to describe the behaviour of different topologies of power converters. However, in order to be implemented, an FPGA with wide range of resources is required; around 65000 Look Up Tables (LUT) to obtain a step size of the order of 5ns, in some cases multiplex arithmetic operations can reduce the size between 15000 and 6000 LUT, with a cost of increasing the step size to 250 ns [18] In this article, the model based on Switching Functions (SF) for a Dual Interleaved Buck-Boost Converter (DIBBC) with interphase transformer (IPT) was developed, and the hardware implementation was made for an FPGA of limited resources.…”
Section: Introductionmentioning
confidence: 99%
“…In the early 1990s, a switch model that keeps the network equations fixed regardless of switch statuses was proposed [11], [12]. The fixed-matrix modelling approach has successfully been implemented on FPGA [6], [8], [13], but it is known to introduce false numerical transients due to its convergence process that restricts its operation at high switching frequencies [14].…”
Section: Introductionmentioning
confidence: 99%