Real-time radar signal processing on Massively Parallel Processor Arrays

Abstract

The next generation radar systems have high performance demands on the signal processing chain. Among these are advanced image creating sensor systems in which complex calculations are to be performed on huge sets of data in realtime. Massively Parallel Processor Arrays (MPPAs) are gaining attention to cope with the computational requirements of complex radar signal processing by exploiting the massive parallelism inherent in the algorithms in an energy efficient manner.In this paper, we evaluate two such massively parallel architectures, namely, Ambric and Epiphany, by implementing a significantly large case study of autofocus criterion calculation, which is a key component in future synthetic aperture radar systems. The implementation results from the two case studies are compared on the basis of achieved performance, energy efficiency, and programmability.

A running leap for embedded signal processing to future parallel platforms

“…Manycore processor architectures offer scalable parallelism and the performance needed for implementation of the functionality required in high-end embedded sensor-and communication systems. We developed software tool support for targeting the emerging manycore architectures [20,21,22].…”

Efficient Single-Precision Floating-Point Division Using Harmonized Parabolic Synthesis

“…For instance, the advanced image creating sensors in synthetic aperture radar systems perform complex calculations on huge sets of data in real-time and these calculations include interpolation and correlation calculations, which consist of significant amount of floating-point operations [1], [2]. However, it is quite challenging to implement efficient floatingpoint arithmetics in hardware.…”

Uma avaliação experimental da plataforma parallella utilizando controle preditivo baseado em modelo como um estudo de caso

“…Existem outros trabalhos que também contribuíram com a análise de desempenho da arquitetura Epiphany, como em [71] e [72], em que tal arquitetura é comparada com um processador Intel-I7 e [69] e [73], que exploram o uso MPI (do inglês, Message Passing Interface).…”