Efficient Single-Precision Floating-Point Division Using Harmonized Parabolic Synthesis

Abstract

Abstract-This paper proposes a novel method for performing division on floating-point numbers represented in IEEE-754 single-precision (binary32) format. The method is based on an inverter, implemented as a combination of Parabolic Synthesis and second-degree interpolation, followed by a multiplier. It is implemented with and without pipeline stages individually and synthesized while targeting a Xilinx Ultrascale FPGA.The implementations show better resource usage and latency results when compared to other implementations based on different methods. In case of throughput, the proposed method outperforms most of the other works, however, some Altera FPGAs achieve higher clock rate due to the differences in the DSP slice multiplier design.Due to the small size, low latency and high throughput, the presented floating-point division unit is suitable for high performance embedded systems and can be integrated into accelerators or be used as a stand-alone accelerator.

Hardware Efficient Reciprocal Using Second Order Harmonized Parabolic Synthesis and Squaring Shrunk Method

“…The normally form of reciprocal computation can be shown in (5), it is the mantissa of the floating-point number [14]. In the harmonized parabolic synthesis method, the input and output variable should be normalized to the range of [0, 1].…”

“…In the HPS method, in order to implement reciprocal with high accuracy and low complexity, constructing sufficient sub-functions has become the key. To simplify the hardware implementation, simple first order first sub-function has been presented in [14] and [16] for approximating reciprocal. However, it has the drawback of low convergence and low accuracy.…”

“…Parabolic synthesis method has shown a wide application in arbitrary function, e.g., sine and cosine function [10], [11], logarithmic and exponential function [12], and roots, inverse and inverse roots function [13]. To further release the hardware burden and improve the computing precision of reciprocal, harmonized parabolic synthesis (HPS) [14] and non-linear interpolation [15] have been proposed recently. For example, a simple first order first sub-function with non-linear interpolation second order second sub-function in harmonized parabolic synthesis for reciprocal has been analysed in [14] and [16], it shows performance improvement over Newton-Raphson method.…”

“…To construct a hardware efficient implementation of reciprocal with high precision and low memory and multiplier usage, second order first sub-function and squaring shrunk method have been proposed in this paper. The proposed method inherits the harmonized parabolic synthesis method with non-linear interpolation in second sub-function as shown in [14] and [16], and constructs second order first sub-function to obtain a high precision. The proposed second order first sub-function reduces the memory usage by employing the symmetric property of the first help function.…”

Designing Domain-Specific Heterogeneous Architectures from Dataflow Programs

“…To generate the hardware blocks, we developed a new back-end that generates a combination of hardware and software code, using the Chisel and C languages, respectively. Those actions, which are tagged as hot-spots during the analysis step, were converted into hardware blocks acting as accelerators in Chisel, whereas the rest of the application was converted into target-specific software, which at present is in C. The code generator makes use of a library of hardware blocks consisting of efficient implementations for floating-point division [77] and square root operations.…”