Real-time FPGA-based implementation of the AKAZE algorithm with nonlinear scale space generation using image partitioning

Soleimani, Parastoo; Capson, David W.; Li, Kin Fun

doi:10.1007/s11554-021-01089-9

Cited by 8 publications

(4 citation statements)

References 18 publications

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“…In [33], only the scale space generation is implemented. Huang et al [34] implement the BRIEF algorithm which does not use an orientation estimation stage.…”

Section: Implementation Resultsmentioning

confidence: 99%

A Fully Pipelined FPGA Architecture for Multiscale BRISK Descriptors With a Novel Hardware-Aware Sampling Pattern

Ghaffari

Capson

2022

IEEE Trans. VLSI Syst.

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Binary descriptors have been shown to be faster than nonbinary descriptors while producing comparable results in image matching applications. In recent years, there have been many attempts to design hardware accelerators for extraction of binary descriptors to achieve higher processing rates. One of the well-known methods is the binary robust invariant scalable key point (BRISK) algorithm, which has shown outstanding results in various applications. In this work, we propose a multiscale fieldprogrammable gate array (FPGA)-based hardware architecture for the BRISK descriptor. In addition, a new image sampling pattern for the BRISK algorithm is described which is shown to be more efficient than the original sampling pattern for hardware implementation. Our new sampling pattern decreases the size of the patches containing the key point to one-quarter of the size of that used in the original BRISK algorithm, which leads to a reduction in FPGA resource utilization while maintaining the accuracy of the image matching application. Our proposed design is fully pipelined and achieves a frame rate of 78 fps on images with full HD resolution.

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“…In [33], only the scale space generation is implemented. Huang et al [34] implement the BRIEF algorithm which does not use an orientation estimation stage.…”

Section: Implementation Resultsmentioning

confidence: 99%

A Fully Pipelined FPGA Architecture for Multiscale BRISK Descriptors With a Novel Hardware-Aware Sampling Pattern

Ghaffari

Capson

2022

IEEE Trans. VLSI Syst.

Self Cite

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“…The pair with the least number of differences is considered the best similarity. At the end of the running matching function, the best matching pair of core points are choos in the previous image [16].…”

Section: Detecting License Plate Featuresmentioning

confidence: 99%

Optical System to Recognize Car Plate Ownership

Abbas

Mohamad

2023

Mal. J. Fund. Appl. Sci.

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The process development of the image processing can solve the problem of detection and recognition of the license plate by taking pictures of the cars and then recognizing them. Most traffic applications rely on automatic vehicle plate detection in parking lots, border control, speed control, etc. In this study, a smart visual system was presented to identify car plates in the College of Science for Girls - University of Baghdad parking lot. The work included distinguishing the car plate and identifying cars, whether they belonged to the college or not. This process was based on the Cascade Classifier method based on the Viola-Jones algorithm, and a database for all car plate features was stored in a file using the proposed method. The recognized car was compared with the characteristics of the database using Oriented FAST and Rotated BRIEF then features were extracted using Histograms of Oriented Gradients. The license plate is recognized when matching features are employed using the matching feature’s function. The results of congruence and discrimination were excellent and very highly efficient. The luminous intensity dependence is considered, as the work is based on the red band of the car's image.

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“…In this paper, a large number of algorithms have been verified for various scenes such as ordinary road surface and grass, and the image matching localization method has been fully verified in the process of translation, rotation, and climbing of the UAV. The input image size of the visual navigation module is 640 × 480, which can realize real-time image processing (Jiang et al, 2015 ; Soleimani et al, 2021 ) and ensure the real-time demand of the flight control response cycle.…”

Section: Algorithm Embedded Device Verificationmentioning

confidence: 99%

High precision visual localization method of UAV based on feature matching

Xue¹,

Zhong²,

Liao³

et al. 2022

Front. Comput. Neurosci.

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In this paper, the precision hovering problem of UAV operation is studied. Aiming at the diversity and complexity of the UAV operating environment, a high-precision visual positioning and orientation method based on image feature matching was proposed. The image feature matching based on the improved AKAZE algorithm is realized, and the optimal matching point pair screening method based on the fusion of Hamming distance and matching line angle is innovatively proposed, which greatly improves the robustness of the algorithm without affecting the performance of the algorithm. The real-time image is matched with the benchmark image for image feature matching. By reducing the deviation of image feature, the pose state correction of UAV hovering is achieved, and the precision hovering of the UAV is realized. Both simulation and real UAV tests verify the effectiveness of the proposed UAV high-precision visual positioning and orientation method.

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Real-time FPGA-based implementation of the AKAZE algorithm with nonlinear scale space generation using image partitioning

Cited by 8 publications

References 18 publications

A Fully Pipelined FPGA Architecture for Multiscale BRISK Descriptors With a Novel Hardware-Aware Sampling Pattern

A Fully Pipelined FPGA Architecture for Multiscale BRISK Descriptors With a Novel Hardware-Aware Sampling Pattern

Optical System to Recognize Car Plate Ownership

High precision visual localization method of UAV based on feature matching

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