RDVIS: A Tool that Visualizes the Causes of Low Locality and Hints Program Optimizations

Beyls, Kristof; D’Hollander, Erik H.; Vandeputte, Frederik

doi:10.1007/11428848_21

Cited by 10 publications

(8 citation statements)

References 17 publications

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“…In this paper, we present two tools that analyze the IEC in different ways to pinpoint the required refactorings: RD-VIS (Reuse Distance VISualizer), which has been discussed earlier in [7], and SLO (Suggestions for Locality Optimizations). RDVIS represents the IEC as a set of basic blocks executed between long-distance reuses.…”

Section: Related Workmentioning

confidence: 99%

Intermediately executed code is the key to find refactorings that improve temporal data locality

Beyls

D’Hollander

2006

Proceedings of the 3rd Conference on Computing Frontiers

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The growing speed gap between memory and processor makes an efficient use of the cache ever more important to reach high performance. One of the most important ways to improve cache behavior is to increase the data locality. While many cache analysis tools have been developed, most of them only indicate the locations in the code where cache misses occur. Often, optimizing the program, even after pinpointing the cache bottlenecks in the source code, remains hard with these tools.In this paper, we present two related tools that not only pinpoint the locations of cache misses, but also suggest source code refactorings which improve temporal locality and thereby eliminate the majority of the cache misses. In both tools, the key to find the appropriate refactorings is an analysis of the code executed between a data use and the next use of the same data, which we call the Intermediately Executed Code (IEC). The first tool, the Reuse Distance VISualizer (RD-VIS), performs a clustering on the IECs, which reduces the amount of work to find required refactorings. The second tool, SLO (short for "Suggestions for Locality Optimizations"), suggests a number of refactorings by analyzing the call graph and loop structure of the IEC. Using these tools, we have pinpointed the most important optimizations for a number of SPEC2000 programs, resulting in an average speedup of 2.3 on a number of different platforms.

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Section: Related Workmentioning

confidence: 99%

Intermediately executed code is the key to find refactorings that improve temporal data locality

Beyls

D’Hollander

2006

Proceedings of the 3rd Conference on Computing Frontiers

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“…At the execution level, performance visualization tools (such as [28,26,27,4], Intel VTune ) show developers where performance bottlenecks occur, such as loop parallelism, frequent cache misses, instruction cycles. Frequently software metrics are combined with program visualization, as in Systa, Yu, and Mueller [23].…”

Section: Related Workmentioning

confidence: 99%

Visualizing non-functional requirements

Ernst

Mylopoulos

2006

2006 First International Workshop on Requirements Engineering Visualization (REV'06 - RE'06 Workshop)

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“…Beyls and D'Hollander collect reuse distance distribution for memory instructions through one profiling run to generate cache replacement hints for an Itanium processor [19]. Beyls, D'Hollander and Vandeputte present a reuse distance visualization tool called RDVIS that suggests memory-hierarchy optimization [20]. Marin and Mellor-Crummey [21] incorporate reuse distance analysis in their performance models to calculate cache misses.…”

Section: Related Workmentioning

confidence: 99%

Path-Based Reuse Distance Analysis

Fang¹,

Carr

Önder

et al. 2006

Lecture Notes in Computer Science

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Abstract. Profiling can effectively analyze program behavior and provide critical information for feedback-directed or dynamic optimizations. Based on memory profiling, reuse distance analysis has shown much promise in predicting data locality for a program using inputs other than the profiled ones. Both wholeprogram and instruction-based locality can be accurately predicted by reuse distance analysis.Reuse distance analysis abstracts a cluster of memory references for a particular instruction having similar reuse distance values into a locality pattern. Prior work has shown that a significant number of memory instructions have multiple locality patterns, a property not desirable for many instruction-based memory optimizations. This paper investigates the relationship between locality patterns and execution paths by analyzing reuse distance distribution along each dynamic path to an instruction. Here a path is defined as the program execution trace from the previous access of a memory location to the current access. By differentiating locality patterns with the context of execution paths, the proposed analysis can expose optimization opportunities tailored only to a specific subset of paths leading to an instruction.In this paper, we present an effective method for path-based reuse distance profiling and analysis. We have observed that a significant percentage of the multiple locality patterns for an instruction can be uniquely related to a particular execution path in the program. In addition, we have also investigated the influence of inputs on reuse distance distribution for each path/instruction pair. The experimental results show that the path-based reuse distance is highly predictable, as a function of the data size, for a set of SPEC CPU2000 programs.

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RDVIS: A Tool that Visualizes the Causes of Low Locality and Hints Program Optimizations

Cited by 10 publications

References 17 publications

Intermediately executed code is the key to find refactorings that improve temporal data locality

Intermediately executed code is the key to find refactorings that improve temporal data locality

Visualizing non-functional requirements

Path-Based Reuse Distance Analysis

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