RD53A: A large-scale prototype chip for the phase II upgrade in the serially powered HL-LHC pixel detectors

Abstract

The phase II upgrade of the HL-LHC experiments within the LHC intends to deepen the studies of the Higgs boson and to allow the discovery of further particles by adding an integrated luminosity of about 4000 fb -1 over 10 years of operation. This upgrade would overwhelm the installed pixel detector readout chips with higher hit rates and radiation levels than ever before. To match these extreme requirements the RD53 collaboration, a joint effort between ATLAS and CMS, developed RD53A, a new generation pixel detector readout chip prototype manufactured in a 65 nm CMOS technology. It is half the size of the final pixel chips and designed to meet requirements in the face of 3 GHz/cm 2 hit rate after irradiation to 500 Mrad. The detector is able to use 50x50 µm 2 or 25x100 µm 2 pixels with high readout speed of up to 4 links per chip with 1.28 Gbit/s each. Shunt-LDO regulators integrated on the bottom of the chip provide the required voltages to the two power domains, analog and digital. These regulators enable serial powering of the pixel modules, which is the only feasible, radiation hard scheme to ensure acceptable power cable losses and to stay within the material budget for the future pixel detectors. An overview of the status and challenges of serial powering and the Shunt-LDO regulator development will be given.

RD53 analog front-end processors for the ATLAS and CMS experiments at the High-Luminosity LHC

“…Irradiation was performed with X-rays at cold, with RD53A powered on and read out continuously. No significant effects are detectable on the noise performance of the front-ends after irradiation [14].…”

“…The issue has been easily fixed in RD53B by pre-placing and pre-routing digital buffers at the comparator outputs in the matrix core. For the differential front-end a pixel by pixel variation of the hit signal edges has been also detected [14] (the hit signal being the digital signal toggling for an input signal crossing the threshold). Such a digital signal is triggered, in the RD53A version of the DIFF, by the comparator output falling edge which features a very low slew rate, resulting in a large dispersion of the hit leading edge.…”

The CMS pixel detector for the high luminosity LHC

“…The ROC required for the IT is a technology frontier device that needs to withstand 1.2 Grad of total ionising dose and a maximum hit rate of 3.2 GHz/cm 2 . It is being developed by the RD53 collaboration [7] in 65nm technology and features a 50 × 50 µm 2 elementary cell, low threshold (< 1000e − ), high hit and trigger rate (thanks to up to four 1.28 Gb/s output links), radiation resistance and serial powering capabilities.…”

Module and System Test Development for the Phase-2 ATLAS ITk Pixel Upgrade

“…More than 250 chips have been successfully tested on single chip cards. The tests include automated wafer probing, tuning of unirradiated and irradiated modules, irradiation of chips with X-ray and radioactive sources, testbeams and serial powering [8].…”