Quasistatic and high frequency capacitance–voltage characterization of Ga2O3–GaAs structures fabricated by in situ molecular beam epitaxy

Abstract

Interface properties of Ga2O3–GaAs structures fabricated using in situ multiple-chamber molecular beam epitaxy have been investigated. The oxide films were deposited on clean, atomically ordered (100) GaAs surfaces at ≂600 °C by electron-beam evaporation using a Gd3Ga5O12 single-crystal source. Metal–insulator–semiconductor structures have been fabricated in order to characterize the Ga2O3–GaAs interface by capacitance–voltage measurements in quasistatic mode and at frequencies between 100 Hz and 1 MHz. The formation of inversion layers in both n and p-type GaAs has been clearly established. Using the quasistatic/high frequency technique, the interface state density has been derived as a function of band gap energy and a midgap interface state density in the mid 1010 cm−2 eV−1 range has been inferred. Charge trapping in the oxide has been revealed as the dominant trapping mechanism.

Formation of ultrathin SiNx∕Si interface control double layer on (001) and (111) GaAs surfaces for ex situ deposition of high-k dielectrics

“…Recognition of near-future occurrence of ultimate scaling limit of Si complementary metal-oxide-semiconductor ͑CMOS͒ technology by Si industries such as Intel Corp. 1 has recently stimulated strong revived interests in III-V metal-insulator-semiconductor ͑MIS͒ transistors such as InAlSb/ InSb MIS-heterojunction-field-effect transistors, 2 nanoscale GaAs MOS transistors using Ga 2 O 3 /Gd 2 O 3 , etc., 3,4 and MIS-field-effect transistors on vertical InAs nanowires by vapor-liquid-solid ͑VLS͒ growth. 5 The well-known problem here is that free surfaces and MIS interfaces of III-V semiconductors generally possess high density of surface/ interface states which pin the Fermi level and cause various unwanted problems.…”

Detection of Ga suboxides and their impact on III-V passivation and Fermi-level pinning

“…Despite having been studied in great detail for more than 35 years, this interface and the identification of the bonding configurations that cause the defects has remained challenging. [1][2][3][4] Problems with metaloxide-semiconductor ͑MOS͒ devices on GaAs and InGaAs, including frequency dispersion of capacitance and suboptimal electron mobility, have been attributed to a number of different surface species including Ga-O bonds, As-O bonds, elemental As, and As and Ga antisites. 5 Recent studies have shown that Ga-O ͑Ref.…”

Synchrotron radiation photoemission spectroscopic study of band offsets and interface self-cleaning by atomic layer deposited HfO2 on In0.53Ga0.47As and In0.52Al0.48As

“…In order to prevent defect formation and Fermi-level pinning, various surface passivation techniques such as Si or Ge passivation [9], sulfur passivation [12], Ga 2 O 3 (Gd 2 O 3 ) passivation [10] have been proposed and demonstrated. However, Si and Ge are incorporated as dopants in III-V semiconductor substrate and alter the doping profile.…”

“…In order to sustain a better gate capacitance scalability for metal-oxide-semiconductor (MOS) device application, high-k dielectrics have been deposited onto the III-V semiconductor substrates, such as GaAs and InGaAs [2][3][4][5][6][7][8][9][10][11][12].…”