Formation of ultrathin SiNx∕Si interface control double layer on (001) and (111) GaAs surfaces for ex situ deposition of high-k dielectrics

Abstract

In order to realize pinning-free high-k dielectric metal-insulator-semiconductor ͑MIS͒ gate stack on ͑001͒ and ͑111͒B oriented GaAs surfaces using the Si interface control layer ͑Si ICL͒ concept, formation of a SiN x / Si ICL double layer was investigated as a chemically stable structure on ͑001͒ and ͑111͒B surfaces which allows ex situ deposition of HfO 2 high-k dielectric films without losing the benefit of Si ICL. First, Si ICLs grown by molecular beam epitaxy ͑MBE͒ on ͑001͒ and ͑111͒B GaAs surfaces with various initial surface reconstructions were investigated in detail by reflection high energy electron diffraction and x-ray photoelectron spectroscopy ͑XPS͒ investigations at each step of the interface formation. Large shifts of the surface Fermi level position toward unpinning were observed after Si ICL growth on appropriately formed Ga-stabilized surfaces. It was found that Si layers grow epitaxially with Si-Ga bonds at the Si/ GaAs interface and Si-As termination on top, suggesting surfactant roles played by As atoms. Then, an ultrathin SiN x buffer film was formed on the Si ICL by its in situ partial nitridation in the MBE chamber. An XPS analysis of the resultant SiN x / Si ICL double layer formed on ͑001͒ and ͑111͒B surface indicated that the structure is chemically stable against air exposure on both surfaces in the sense that it prevents the host GaAs surface from subcutaneous oxidation, although SiN x film itself partially turns into SiO x N y . Finally, high-k MIS capacitors were formed by ex situ deposition of HfO 2 on the SiN x / Si ICL/GaAs structure after transferring the sample through air. The capacitance-voltage ͑C-V͒ analysis indicated that the MIS interface is completely pinning-free with a minimum interface state density in the range of low 10 11 cm −2 eV −1 .

High-k Al2O3 MOS structures with Si interface control layer formed on air-exposed GaAs and InGaAs wafers

“…This is again similar to the situation observed in the SiN x /Si ICL/GaAs structure formed by the UHV in-situ process [12].…”

“…Here, the SiN x /Si structure effectively prevents subcutaneous oxidation during sample transfer in air in spite of the monolayer level thickness of the SiN x buffer layer, as confirmed previously [12]. As the main high-k insulator, an Al 2 O 3 film was deposited by the standard ALD process.…”

“…Here, the Si ICL is grown in situ by molecular beam epitaxy (MBE) on the MBE-grown clean III-V surface. Using this method, we recently reported on successful fabrication of the HfO 2 /GaAs high-k MOS structure, realizing a completely unpinned I-S interface with a minimum of interface state density (D it ) of 1 x 10 11 eV -1 cm -2 or below [12,13]. However, the drawback of this process is that it cannot be applied to standard III-V epitaxial wafers with air-exposed surfaces, because it requires in-situ MBE growth of both of the III-V material and the Si ICL.…”

Distributed Pinning Spot Model for High-k Insulator - III-V Semiconductor Interfaces

“…However, basic characterization and understanding of the electrical properties of the interface are still missing. In fact, we recently fabricated HfO 2 /GaAs high-k MIS structures controlled by a Si ICL, and realized MIS interfaces free from Fermi level pinning [5]. However, we also observed various anomalies in the admittance behavior and proposed a distributed pinning-spot (DPS) model [6] as a possible model to explain them.…”

“…1. The details of the fabrication process and its characterization by the in-situ X-ray photoemission spectroscopy was described elsewhere [5]. Briefly, it was fabricated as follows.…”