High-k Al2O3 MOS structures with Si interface control layer formed on air-exposed GaAs and InGaAs wafers

Abstract

This paper attempts to realize unpinned high-k insulator-semiconductor interfaces on air-exposed GaAs and In 0.53 Ga 0.47 As by using the Si interface control layer (Si ICL).Al 2 O 3 was deposited by ex-situ atomic layer deposition (ALD) as the high-k insulator.By applying an optimal chemical treatment using HF acid combined with subsequent thermal cleaning below 500 o C in UHV, interface bonding configurations similar to those by in-situ UHV process was achieved both for GaAs and InGaAs after MBE growth of the Si ICL with no trace of residual native oxide components.As compared with the MIS structures without Si ICL, insertion of Si ICL improved the electrical interface quality a great deal both for GaAs and InGaAs, reducing frequency dispersion of capacitance, hysteresis effects and interface state density (D it ). A minimum value of D it of 2x10 11 eV -1 cm -2 was achieved both for GaAs and InGaAs. However, the range of bias induced surface potential excursion within the band gap was different, making formation of electron layer by surface inversion possible in InGaAs, but not possible in GaAs. The difference was explained by the disorder induced gap state (DIGS) model.

Atomic imaging of atomic layer deposition oxide nucleation with trimethylaluminum on As-rich InGaAs(001) 2 × 4 vs Ga/In-rich InGaAs(001) 4 × 2

“…For the decapped surface (solid blue curves), Fermi level on both the n-type and p-type samples is positioned near the valance band (VB) indicating the decapped surface is pinned. For InGaAs, it is common that the Fermi level is pinned near the conduction band edge; 39 however, STS is a conductance based technique and will ignore fixed charge or deep traps, a more detailed analysis of this topic can be seen in Ref. 40.…”

(Invited) Gate Stacks for Silicon, Silicon Germanium, and III-V Channel MOSFETs

“…Gate stack quality on GaAs can thus be improved over conventional direct dielectric deposition. This was first demonstrated in 1988 using Si-based dielectrics (32)(33)(34) and verified later with high-k dielectrics (35,36). A beneficial impact of atomic hydrogen on interface trap density has been observed with both types of gate stacks (37,38).…”

High temperature thermal stability studies of ultrathin Al2O3 layers deposited on native oxide and sulphur passivated InGaAs surfaces

“…Controlling III-V surface oxidation, which leads to the formation of a high density of extrinsic defect states (D it ) at the high-k/InGaAs interface, is a major challenge to optimum device operation. Passivation procedures aimed at controlling D it by removal of the native oxide have been developed [4][5][6][7][8]. The use of sulphur based chemicals such as ammonium sulphide (NH 4 ) 2 S [1,9] have been extensively investigated due to its effectiveness at removing native oxides and passivating the surface thereby improving the electrical characteristics of devices [1,3,10,11].…”