Quantum Dot Nonvolatile Memories

Dimitrakis, Panagiotis; Normand, P.; Ioannou‐Sougleridis, V.

doi:10.1007/978-3-319-15290-5_5

Cited by 3 publications

(10 citation statements)

References 64 publications

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“…A 'universal memory' [26][27][28] is often proposed as a jack of all trades device to close the memory gap. Note that in the original memory hierarchy as shown in figure 1(b) a 'universal memory' was proposed as a device having the performance of DRAM or SRAM, the non-volatility of flash and the cost of DRAM or NOR flash.…”

Section: Overview and Basic Limitationsmentioning

confidence: 99%

“…To reduce the necessary gate-voltage, channel hot electron (CHE) injection can be applied (figure 4(c)). A gate voltage turns the transistor on and a high source-drain voltage accelerates electrons until their kinetic energy is above the conduction band offset of 3.1-3.2 eV between Si and SiO 2 as the usual insulator [28,29,62,[64][65][66]. Stray processes and the applied positive gate voltage deflect electrons into the FG.…”

Section: Flash Memory and Solid-state Drive (Ssd)mentioning

confidence: 99%

“…Utilizing this process extends the endurance of the flash cells to about 10 6 cycles. However, two drawbacks exist [28,29,31]: (1) less than 0.01% of the accelerated electrons are injected into the FG and thus, the high source-drain currents cause massive energy consumption. (2) Electrons cannot be removed from the channel in this way and erasing still depends on Fowler-Nordheim tunneling with high electric fields.…”

Section: Flash Memory and Solid-state Drive (Ssd)mentioning

confidence: 99%

“…Having discussed the single cell operation, the arrangement in arrays needs to be discussed as stated at the beginning of this section. So-called NOR and NAND architectures [28,29] (figure 4(d)) are used and named according to their similarities with the n-MOS part (metal-oxide-semiconductor with negative charge carrier) of NOR and NAND gates, respectively. From the DRAM, we know, that memory arrays consist of word-lines and bit-lines that are connected to different lines and rows of memory cells.…”

Section: Flash Memory and Solid-state Drive (Ssd)mentioning

confidence: 99%

“…For floating gate cells, a high quality tunneling oxide is required to achieve high reliability [29,61]. In recent generations of planar gate stacks, an inter-poly dielectric (this is what the insulating stack between floating gate and poly-silicon control gate electrode is called) with high permittivity was introduced to reduce the height of the floating gate [28,82,83]. When going to a 3D arrangement with floating gate, such a solution is highly desirable in order to avoid a drastic increase of the integration effort [28,[84][85][86].…”

Section: Flash Memory and Solid-state Drive (Ssd)mentioning

confidence: 99%

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Memory technology—a primer for material scientists

et al. 2020

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From our own experience, we know that there is a gap to bridge between the scientists focused on basic material research and their counterparts in a close-to-application community focused on identifying and solving final technological and engineering challenges. In this review, we try to provide an easy-to-grasp introduction to the field of memory technology for materials scientists. An understanding of the big picture is vital, so we first provide an overview of the development and architecture of memories as part of a computer and call attention to some basic limitations that all memories are subject to. As any new technology has to compete with mature existing solutions on the market, today's mainstream memories are explained, and the need for future solutions is highlighted. The most prominent contenders in the field of emerging memories are introduced and major challenges on their way to commercialization are elucidated. Based on these discussions, we derive some predictions for the memory market to conclude the paper.

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Section: Overview and Basic Limitationsmentioning

confidence: 99%

Section: Flash Memory and Solid-state Drive (Ssd)mentioning

confidence: 99%

Section: Flash Memory and Solid-state Drive (Ssd)mentioning

confidence: 99%

Section: Flash Memory and Solid-state Drive (Ssd)mentioning

confidence: 99%

Section: Flash Memory and Solid-state Drive (Ssd)mentioning

confidence: 99%

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Memory technology—a primer for material scientists

et al. 2020

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Charge Storage and Reliability Characteristics of Nonvolatile Memory Capacitors with HfO2/Al2O3-Based Charge Trapping Layers

et al. 2022

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Flash memories are the preferred choice for data storage in portable gadgets. The charge trapping nonvolatile flash memories are the main contender to replace standard floating gate technology. In this work, we investigate metal/blocking oxide/high-k charge trapping layer/tunnel oxide/Si (MOHOS) structures from the viewpoint of their application as memory cells in charge trapping flash memories. Two different stacks, HfO2/Al2O3 nanolaminates and Al-doped HfO2, are used as the charge trapping layer, and SiO2 (of different thickness) or Al2O3 is used as the tunneling oxide. The charge trapping and memory windows, and retention and endurance characteristics are studied to assess the charge storage ability of memory cells. The influence of post-deposition oxygen annealing on the memory characteristics is also studied. The results reveal that these characteristics are most strongly affected by post-deposition oxygen annealing and the type and thickness of tunneling oxide. The stacks before annealing and the 3.5 nm SiO2 tunneling oxide have favorable charge trapping and retention properties, but their endurance is compromised because of the high electric field vulnerability. Rapid thermal annealing (RTA) in O2 significantly increases the electron trapping (hence, the memory window) in the stacks; however, it deteriorates their retention properties, most likely due to the interfacial reaction between the tunneling oxide and the charge trapping layer. The O2 annealing also enhances the high electric field susceptibility of the stacks, which results in better endurance. The results strongly imply that the origin of electron and hole traps is different—the hole traps are most likely related to HfO2, while electron traps are related to Al2O3. These findings could serve as a useful guide for further optimization of MOHOS structures as memory cells in NVM.

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Challenges to Optimize Charge Trapping Non-Volatile Flash Memory Cells: A Case Study of HfO2/Al2O3 Nanolaminated Stacks

Spassov,

Paskaleva

2023

Nanomaterials

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The requirements for ever-increasing volumes of data storage have urged intensive studies to find feasible means to satisfy them. In the long run, new device concepts and technologies that overcome the limitations of traditional CMOS-based memory cells will be needed and adopted. In the meantime, there are still innovations within the current CMOS technology, which could be implemented to improve the data storage ability of memory cells—e.g., replacement of the current dominant floating gate non-volatile memory (NVM) by a charge trapping memory. The latter offers better operation characteristics, e.g., improved retention and endurance, lower power consumption, higher program/erase (P/E) speed and allows vertical stacking. This work provides an overview of our systematic studies of charge-trapping memory cells with a HfO2/Al2O3-based charge-trapping layer prepared by atomic layer deposition (ALD). The possibility to tailor density, energy, and spatial distributions of charge storage traps by the introduction of Al in HfO2 is demonstrated. The impact of the charge trapping layer composition, annealing process, material and thickness of tunneling oxide on the memory windows, and retention and endurance characteristics of the structures are considered. Challenges to optimizing the composition and technology of charge-trapping memory cells toward meeting the requirements for high density of trapped charge and reliable storage with a negligible loss of charges in the CTF memory cell are discussed. We also outline the perspectives and opportunities for further research and innovations enabled by charge-trapping HfO2/Al2O3-based stacks.

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Quantum Dot Nonvolatile Memories

Cited by 3 publications

References 64 publications

Memory technology—a primer for material scientists

Memory technology—a primer for material scientists

Charge Storage and Reliability Characteristics of Nonvolatile Memory Capacitors with HfO2/Al2O3-Based Charge Trapping Layers

Challenges to Optimize Charge Trapping Non-Volatile Flash Memory Cells: A Case Study of HfO2/Al2O3 Nanolaminated Stacks

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