Quantum dot cellular automata magnitude comparators

Ghosh, Bahniman; Gupta, Shoubhik; Kumari, Smriti

doi:10.1109/edssc.2012.6482766

Cited by 25 publications

(20 citation statements)

References 2 publications

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“…A=1 and B=0) [14][15]. Graphically observation in terms of cell count, area &latency of proposed design with previous design described in [13], [14], [15].…”

Section: Qca Preleminaries a Qca Cellmentioning

confidence: 99%

Analysis of Novel Comparator Design Using Quantum Dot Cellular Automata (QCA)

Banerjee¹

2018

IJRASET

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“…A=1 and B=0) [14][15]. Graphically observation in terms of cell count, area &latency of proposed design with previous design described in [13], [14], [15].…”

Section: Qca Preleminaries a Qca Cellmentioning

confidence: 99%

Analysis of Novel Comparator Design Using Quantum Dot Cellular Automata (QCA)

Banerjee¹

2018

IJRASET

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“…There are three basic gates in this technology: inverter gate, majority (M) gate, and XOR gate [3][4]. These gates are building blocks for constructing the logic circuits such as QCA multiplexers [5,7], QCA full address [1-3, 6, 8] and QCA comparators [9][10][11][12][15][16][17][18].…”

Section: Introductionmentioning

confidence: 99%

“…On the other hand, the comparator circuits play an important role in digital circuits such as micro controllers [6,12,[15][16][17][18]. Thus, the implementation of high-performance comparator circuits has a great deal of attention, and a lot of effort [10][11][12][15][16][17][18] has been invested in performance improvement in the QCA comparator circuits. Das and De [10] have presented a 1-bit QCA comparator that requires 0.343 µm 2 area and 319 QCA cells.…”

Section: Introductionmentioning

confidence: 99%

“…Shinha et al [12] have proposed two QCA comparator circuits that require 40 and 37 QCA cells and 0.032 and 0.028 µm 2 area, respectively. Ghosh et al [16] have presented a 1-bit QCA comparator circuit that requires 0.06 µm 2 area and 73 QCA cells. Akter et al [17] have presented a 1-bit QCA comparator circuit, which requires 0.11 µm 2 area and 87 QCA cells.…”

Section: Introductionmentioning

confidence: 99%

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Design of efficient coplanar 1-bit comparator circuit in QCA technology

2019

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QCA technology is an emerging and promising technology for implementation of digital circuits in nano-scale. The comparator circuits play an important role in digital circuits. In this work, a new and efficient coplanar 1-bit comparator circuit is proposed and evaluated in the QCA technology. The designed coplanar 1-bit QCA comparator circuit is constructed based on majority gate, XNOR gate and inverter gate that are designed carefully. The functionality of the designed coplanar 1-bit QCA comparator circuit is verified by using QCADesigner version 2.0.3. The obtained results indicate that the designed 1-bit QCA comparator circuit requires 0.03 µm 2 area and 38 QCA cells. It also has 0.5 clock cycles delay. The comparison demonstrates that the designed QCA comparator circuit provides improvements in comparison with other QCA comparator circuits in terms of effective area, cell count, and delay as well as cost.

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“…So any optimization in its complexity and area is appreciated. In paper [19] memory is designed using four dot 1 QCA, but simulation result is not reported in that paper, similarly, a parallel memory circuit presented in paper [20], designed using two dot 1 electron. Here the same approach is used to design 1-bit parallel memory which comprises of two AND Gates and one 2:1 MUX and to meet the area challenge; the parallel memory is designed by using the 2nd proposed 2:1 MUX and its block diagram are represented in Fig.…”

Section: Design Of 1 Bit Parallel Memory Using Proposed 2:1 Muxmentioning

confidence: 99%