QsNetII: Defining High-Performance Network Design

Beecroft, Jon; Addison, David; Hewson, David; McLaren, Moray; Roweth, Duncan; Petrini, Fabrizio; Nieplocha, Jarek

doi:10.1109/mm.2005.75

Cited by 42 publications

(19 citation statements)

References 19 publications

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“…Commodity system area networks such as Infiniband [12], Myrinet [13], Quadrics QsNet2 [14], and PCI-Express Advanced Switching [15] have been proposed to offer scalability and high performance switching. Many of these systems may also offer Network Interface Cards that are programmable at the (usually system-) software level but do not provide any hardware customization capability.…”

Section: Related Workmentioning

confidence: 99%

“…These primitives are already available in high-performance networks [13], [14] and show up even in relatively low-cost Gigabit Ethernet controllers that support RDMA functionality over TCP.We also believe that the RDMA primitives are attractive and we have added the flexible notification mechanisms that has been shown to be very effective in improving the interrupt processing cost [1].…”

Section: Related Workmentioning

confidence: 99%

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Prototyping Efficient Interprocessor Communication Mechanisms

Papaefstathiou

Pnevmatikatos

Marazakis

et al. 2007

2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

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Abstract-Parallel computing systems are becoming widespread and grow in sophistication. Besides simulation, rapid system prototyping becomes important in designing and evaluating their architecture. We present an efficient FPGAbased platform that we developed and use for research and experimentation on high speed interprocessor communication, network interfaces and interconnects. Our platform supports advanced communication capabilities such as Remote DMA, Remote Queues, zero-copy data delivery and flexible notification mechanisms, as well as link bundling for increased performance. We report on the platform architecture, its design cost, complexity and performance (latency and throughput). We also report our experiences from implementing benchmarking kernels and a user-level benchmark application, and show how software can take advantage of the provided features, but also expose the weaknesses of the system.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Prototyping Efficient Interprocessor Communication Mechanisms

Papaefstathiou

Pnevmatikatos

Marazakis

et al. 2007

2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

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“…A large number of high-speed interconnects have been introduced in the market over the past few decades, including InfiniBand (IB) [9], 10-Gigabit Ethernet (10GigE) and its variants [17], Myrinet [13], and Quadrics [3]. While most of these interconnects provide similar functionality, they are incompatible with each other, thus imposing a usability bottleneck for many organizations.…”

Section: Introductionmentioning

confidence: 99%

Evaluation of ConnectX Virtual Protocol Interconnect for Data Centers

Grant

Afsahi

Balaji

2009

2009 15th International Conference on Parallel and Distributed Systems

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Abstract-With the emergence of new technologies such asVirtual Protocol Interconnect (VPI) for the modern data center, the separation between commodity networking technology and high-performance interconnects is shrinking. With VPI, a single network adapter on a data center server can easily be configured to use one port to interface with Ethernet traffic and another port to interface with high-bandwidth, low-latency InfiniBand technology. In this paper, we evaluate ConnectX VPI using microbenchmarks as well as real traces from a three-tier data center architecture. We find that with VPI each network segment in the data center can use the most optimal configuration (whether InfiniBand or Ethernet) without having to fall back to the lowest common denominator, as is currently the case. Our results show a maximum 26.7% increase in bandwidth, a 54.5% reduction in latency, and a 5% increase in real data center throughput.

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“…Interconnection networks and the communication system software play a key role on the performance of such clusters. In this regard, several modern networks such as Quadrics [2], InfiniBand [12], Myrinet [19], and 10-Gigabit iWARP Ethernet [24] have been introduced to support scalable and efficient communications. While SMP nodes are traditionally equipped with multiple single-core processors, the emergence of multi-core SMP nodes in clusters, where each core will run at least one process with multiple intranode and inter-node connections to several other processes, will put immense pressure on the interconnection network and its communication system software.…”

Section: Introductionmentioning

confidence: 99%

“…Quadrics QsNet II [2] has hardware support for broadcast and barrier operations. In addition, a number of collectives such as reduce, gather, all-gather, and all-to-all are implemented in its Elan user-level library.…”

Section: Introductionmentioning

confidence: 99%

Efficient shared memory and RDMA based collectives on multi-rail QsNetII SMP clusters

Qian

Afsahi

2008

Cluster Comput

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Clusters of Symmetric Multiprocessors (SMP) are more commonplace than ever in achieving high-performance. Scientific applications running on clusters employ collective communications extensively. Shared memory communication and Remote Direct Memory Access (RDMA) over multi-rail networks are promising approaches in addressing the increasing demand on intra-node and internode communications, and thereby in boosting the performance of collectives in emerging multi-core SMP clusters. In this regard, this paper designs and evaluates two classes of collective communication algorithms directly at the Elan user-level over multi-rail Quadrics QsNet II with message striping: 1) RDMA-based traditional multi-port algorithms for gather, all-gather, and all-to-all collectives for medium to large messages, and 2) RDMA-based and SMP-aware multi-port all-gather algorithms for small to medium size messages.The multi-port RDMA-based Direct algorithm for gather and all-to-all collectives gain an improvement of up to 2.15 for 4 KB messages over elan_gather(), and up to 2.26 for 2 KB messages over elan_alltoall(), respectively. For the all-gather, our SMP-aware Bruck algorithm outperforms all other all-gather algorithms including elan_gather() for 512 B to 8 KB messages, with a 1.96 improvement factor for 4 KB messages. Our multi-port Direct all-gather is the best algorithm for 16 KB to 1 MB, and outperforms elan_gather() by a factor of 1.49 for 32 KB messages. Experimentation with real applications has shown up to 1.47 communication speedup can be achieved using the proposed all-gather algorithms.

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QsNetII: Defining High-Performance Network Design

Cited by 42 publications

References 19 publications

Prototyping Efficient Interprocessor Communication Mechanisms

Prototyping Efficient Interprocessor Communication Mechanisms

Evaluation of ConnectX Virtual Protocol Interconnect for Data Centers

Efficient shared memory and RDMA based collectives on multi-rail QsNetII SMP clusters

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