Q-ary Asymmetric LOCO Codes: Constrained Codes Supporting Flash Evolution

Hareedy, Ahmed; Dabak, Beyza; Calderbank, Robert

doi:10.1109/isit44484.2020.9174176

Cited by 2 publications

(2 citation statements)

References 16 publications

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“…PLC-NAND enables a large number of possible bit-labeling codes. Due to the larger number of bits per cell, codes that reduce the inter-cell interference might be an interesting approach for this technology [26].…”

Section: Discussionmentioning

confidence: 99%

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Error Correction for TLC and QLC NAND Flash Memories Using Cell-Wise Encoding

2022

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The growing error rates of triple-level cell (TLC) and quadruple-level cell (QLC) NAND flash memories have led to the application of error correction coding with soft-input decoding techniques in flash-based storage systems. Typically, flash memory is organized in pages where the individual bits per cell are assigned to different pages and different codewords of the error-correcting code. This page-wise encoding minimizes the read latency with hard-input decoding. To increase the decoding capability, soft-input decoding is used eventually due to the aging of the cells. This soft-decoding requires multiple read operations. Hence, the soft-read operations reduce the achievable throughput, and increase the read latency and power consumption. In this work, we investigate a different encoding and decoding approach that improves the error correction performance without increasing the number of reference voltages. We consider TLC and QLC flashes where all bits are jointly encoded using a Gray labeling. This cell-wise encoding improves the achievable channel capacity compared with independent page-wise encoding. Errors with cell-wise read operations typically result in a single erroneous bit per cell. We present a coding approach based on generalized concatenated codes that utilizes this property.

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Section: Discussionmentioning

confidence: 99%

“…The bit labeling or coding of the cell states was addressed in the literature with different aims. In [26], a coding scheme was introduced that reduces inter-cell interference for various flash types, including QLC and PLC. These constrained codes exclude problematic bit patterns from the set of possible code patterns.…”

Section: Introductionmentioning

confidence: 99%