Pulse-Modulation Imaging—Review and Performance Analysis

Abstract

In time-domain or pulse-modulation (PM) imaging, the incident light intensity is not encoded in amounts of charge, voltage, or current as it is in conventional image sensors. Instead, the image data are represented by the timing of pulses or pulse edges. This method of visual information encoding optimizes the phototransduction individually for each pixel by abstaining from imposing a fixed integration time for the entire array. Exceptionally high dynamic range (DR) and improved signal-to-noise ratio (SNR) are immediate benefits of this approach. In particular, DR is no longer limited by the power-supply rails as in conventional complementary metal-oxide semiconductor (CMOS) complementary metal-oxide semiconductor active pixel sensors, thus providing relative immunity to the supply-voltage scaling of modern CMOS technologies. In addition, PM imaging naturally supports pixel-parallel analog-to-digital conversion, thereby enabling high temporal resolution/frame rates or an asynchronous event-based array readout. The applications of PM imaging in emerging areas, such as sensor network, wireless endoscopy, retinal prosthesis, polarization imaging, and energy harvesting are surveyed to demonstrate the effectiveness of PM imaging in low-power, high-performance machine vision, and biomedical applications of the future. The evolving design innovations made in PM imaging, such as high-speed arbitration circuits and ultra-compact processing elements, are expected to have even wider impacts in disciplines beyond CMOS image sensors. This paper thoroughly reviews and classifies all common PM image sensor architectures. Analytical models and a universal figure of merit - image quality and dynamic range to energy complexity factor are proposed to quantitatively assess different PM imagers across the entire spectrum of PM architectures.

A 151 dB High Dynamic Range CMOS Image Sensor Chip Architecture With Tone Mapping Compression Embedded In-Pixel

“…6 shows the architecture of the chip. Its core is a QCIF (176×144) resolution array of pixels, which are digital pixel sensors (DPS) with Pulse Width Modulation (PWM) [36], including a 2-pixel wide peripheral ring of dummy pixels. The functionality of the chip is supported by several blocks, which are responsible for biasing, generation of analog and digital references, digital control, and high-speed image I/O.…”

Optimized operation and temperature dependence of a direct light-to-time converter

“…By changing its program, we can switch between PWM and PFM. Each of these two modulation schemes has its own strengths and weaknesses that are detailed in [2]. Notably, PFN architectures have the property to average out the noise, leading to a better SNR.…”

“…In this context, Pulse Modulation (PM) imaging appears as an interesting alternative [2]. By representing the image data in the time domain, PM takes advantage of the faster operation and steeper rail-to-rail transitions that characterize deep submicron technologies, leading to a higher resolution in the time domain.…”

A 21.4 pW/frame-pixel PWM image sensor with sub-threshold leakage reduction and two-step readout

“…But in order to ensure enough signal swing, the supply voltage (Vdd) of these analog pixels cannot be scaled too much [9]. Recently, various approaches concerning the use of the pulse-width-modulation (PWM) technique have been investigated [11]. In PWM imaging, the incident light intensity is represented by the width of the pixel output pulse in digital level instead of analog voltages or currents.…”