Abstract-The substrate noise coupling problems in today's complex mixed-signal system-on-chip (MS-SOC) brings a new set of challenges for designers. In this paper, we propose a global methodology that includes an early verification in the design flow as well as a postlayout iterative optimization to deal with substrate noise, and helps designers to achieve a first silicon-success of their chips. An improved semi-analytical modeling technique exploiting the basic behaviors of this noise is developed. This method significantly accelerates the substrate modeling, avoids the dense matrix storage, and, hence, enables the implementation of an iterative noise-immunity optimization loop working at full-chip level. The integration of the methodology in a typical mixed-signal design flow is illustrated and its successful application to achieve a single-chip integration of a transceiver is demonstrated.
A new type of CMOS compatible photodetector, exhibiting intrinsic light-to-time conversion, is proposed. Its main objective is to start the time-to-digital conversion directly at its output, thereby avoiding the cumbersome analog processing. The operation starts with an internal charge integration, followed by a positive feedback, and a sharp switching-current. The device, consisting of a deeply depleted MOS structure controlling the conduction of a forward-based PN diode, is presented and its operation explained. TCAD simulations are used to show the effects of semiconductor parameters and bias conditions. The photodetector and its detection circuit are designed and fabricated in a 0.18µm CMOS process. Measurements of this new device under different biasing and illumination conditions show highly promising properties in terms of linearity, internal gain, and noise performances.
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