PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

Gildenblat, G.; Li, Xin; Wu, Weimin; Wang, Hailin; Jha, Amit; Langevelde, R. van; Smit, G.D.J.; Scholten, A.J.; Klaassen, D.B.M.

doi:10.1109/ted.2005.881006

Cited by 341 publications

(164 citation statements)

References 63 publications

Supporting

Mentioning

155

Contrasting

Unclassified

Order By: Relevance

“…PSP is the most accurate and physical MOSFET model available, 10 and so should be expected to provide good statistical-modeling capability while using as few parameters as possible. Conceptually, the process parameters can be broken into three groups: those that affect only PMOS devices, p p ; those that affect only NMOS devices, p n ; and those that are common and affect both types of devices, p c .…”

Section: Bpv Modeling Including Circuit Performancementioning

confidence: 99%

Extensions to Backward Propagation of Variance for Statistical Modeling

McAndrew¹,

Stevanović

et al. 2010

IEEE Des. Test. Comput.

View full text Add to dashboard Cite

STATISTICAL SIMULATION IS IMPORTANT for the design of high-yield circuits, 1 and statistical simulation requires statistical models. Such models can be generated using numerical techniques such as principal component analysis or factor analysis. 2,3 However, physical models have proven substantially more accurate and efficient than strictly numerical models for retargeting statistical models (both for mean shifts and variance shifts in a process), predicting statistical models for a process based on previous generations of that process, and capturing unexpected or anomalous behavior in statistical variations over bias or geometry. The backward propagation of variance (BPV) technique is a unified approach for physically based statistical modeling, for both global and local (mismatch) statistical variations. 4,5 In this article, we present recent extensions and enhancements to the BPV technique. We show how the assumption of a linear dependence of electrical performance on process parameters can be relaxed, and that correlations between different electrical performances can be explicitly included in the procedure. We include measures of circuit performance as modeling targets, andshow that overspecifying the electrical performances to be modeled can improve overall statistical-modeling accuracy.

show abstract

Section: Bpv Modeling Including Circuit Performancementioning

confidence: 99%

Extensions to Backward Propagation of Variance for Statistical Modeling

McAndrew¹,

Stevanović

et al. 2010

IEEE Des. Test. Comput.

View full text Add to dashboard Cite

show abstract

“…Newer device models often have complexity 4-5× that of the classic bsim3 model [10] (e.g. compare psp [11] and bsim3 models in Table IV). This further motivates the need to accelerate device model evaluation to avoid paying a large modeling cost for future sub- micron circuit netlists.…”

Section: A Structure Of Spice Model Evaluationmentioning

confidence: 99%

Accelerating SPICE Model-Evaluation using FPGAs

Kapre

DeHon

2009

2009 17th IEEE Symposium on Field Programmable Custom Computing Machines

View full text Add to dashboard Cite

Abstract-Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SPICE model-evaluation. Model-evaluation is a key component of the SPICE circuit simulator and it is characterized by large irregular floating-point compute graphs. We show how to exploit the parallelism available in these graphs on single-FPGA designs with a low-overhead VLIW-scheduled architecture. Our architecture uses spatial floating-point operators coupled to local high-bandwidth memories and interconnected by a time-shared network. We retime operation inputs in the model-evaluation to allow independent scheduling of computation and communication. With this approach, we demonstrate speedups of 2-18× over a dual-core 3GHz Intel Xeon 5160 when using a Xilinx Virtex 5 LX330T for a variety of SPICE device models.

show abstract

“…Additionally, as transistor devices shrink in feature-size, the complexity of the device models required to simulate them correctly grows over time. Newer device models often have complexity 3-5× that of the classic bsim3 model [2] (as shown in Table 2, the psp model [3] is 5× more complex than the bsim3 model).…”

Section: Model Evaluationmentioning

confidence: 99%

Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors

Kapre

DeHon

2009

2009 International Conference on Field Programmable Logic and Applications

View full text Add to dashboard Cite

Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor organizations for data-parallel, floating-point computation in SPICE Model-Evaluation. Our Verilog AMS compiler produces code for parallel evaluation of non-linear circuit models suitable for use in SPICE simulations where the same model is evaluated several times for all the devices in the circuit. Our compiler uses architecture specific parallelization strategies (OpenMP for multi-core, PThreads for Cell, CUDA for GPU, statically scheduled VLIW for FPGA) when producing code for these different architectures. We automatically explore different implementation configurations (e.g. unroll factor, vector length) using our performance-tuner to identify the best possible configuration for each architecture. We demonstrate speedups of 3-182× for a Xilinx Virtex5 LX 330T, 1.3-33× for an IBM Cell, and 3-131× for an NVIDIA 9600 GT GPU over a 3 GHz Intel Xeon 5160 implementation for a variety of singleprecision device models.

show abstract

PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

Cited by 341 publications

References 63 publications

Extensions to Backward Propagation of Variance for Statistical Modeling

Extensions to Backward Propagation of Variance for Statistical Modeling

Accelerating SPICE Model-Evaluation using FPGAs

Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors

Contact Info

Product

Resources

About