Properties of high-voltage stress generated traps in thin silicon oxide

Scott, Ron; Dumin, N.A.; Hughes, T.W.; Dumin, D.J.; Moore, B.

doi:10.1109/16.502425

Cited by 60 publications

(29 citation statements)

References 35 publications

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“…Early investigators of SILC in stressed oxides observed a transient component in the leakage current, that was attributed to charging and discharging of oxide traps [210][211][212][213][214] and was exploited to extract information on the oxide quality [215,216]. The detrapping current followed a 1/t dependence down to very short times [217], in agreement with tunneling models [218].…”

Section: Charge Detrappingsupporting

confidence: 52%

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

2017

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Abstract:We review the state-of-the-art in the understanding of planar NAND Flash memory reliability and discuss how the recent move to three-dimensional (3D) devices has affected this field. Particular emphasis is placed on mechanisms developing along the lifetime of the memory array, as opposed to time-zero or technological issues, and the viewpoint is focused on the understanding of the root causes. The impressive amount of published work demonstrates that Flash reliability is a complex yet well-understood field, where nonetheless tighter and tighter constraints are set by device scaling. Three-dimensional NAND have offset the traditional scaling scenario, leading to an improvement in performance and reliability while raising new issues to be dealt with, determined by the newer and more complex cell and array architectures as well as operation modes. A thorough understanding of the complex phenomena involved in the operation and reliability of NAND cells remains vital for the development of future technology nodes.

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Section: Charge Detrappingsupporting

confidence: 52%

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

2017

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“…The physics of gate-oxide wearout and breakdown has been a subject of intense study for decades. The current status of theoretical understanding is that thin oxide of 100 and below follows a wearout model [1], [4]- [8] rather than the feedback runaway model [9]- [12] that dominates thicker oxides.…”

Section: Introductionmentioning

confidence: 98%

Stress-induced leakage current (SILC) and oxide breakdown: are they from the same oxide traps?

Pantisano

Cheung

2001

IEEE Trans. Device Mater. Relib.

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Many research groups have used stress-induced leakage current (SILC) as a mean to measure the oxide traps (defects) buildup in the oxide film during electrical stress. It is commonly believed that these very same traps will lead to oxide breakdown when their density reaches a critical value. We studied the annealing kinetic of SILC as well as the oxide breakdown distribution and found that they are quite different. Our result casts serious doubt on the validity of the popular assumption.

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“…A statistical model for dielectric breakdown has been proposed [25] and confirmed over a wide variety of oxide conditions [26]. This model and the confirmations were based on measuring the time, voltage, and thickness dependences of the trap generation inside the oxides prior to breakdown [27] and coupling the measured time dependences of the trap generation to the statistics of breakdown and the TDDB distributions [25]. In this model, breakdown was triggered when the local density of traps exceeded a critical value.…”

Section: Discussion Of Resultsmentioning

confidence: 99%

Differentiation between electric breakdowns and dielectric breakdown in thin silicon oxides

Jackson

Robinson²,

Oralkan³

et al.

Proceedings of the 1997 6th International Symposium on the Physical and Failure Analysis of Integrated Circuits

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It has been known for some time that non-destructive electric breakdowns precede destructive thermal dielectric breakdown. We have been studying both processes in oxides between 5 nm and 80 nm in thickness. We have shown that the electric breakdowns can trigger dielectric breakdown under certain conditions. This triggering of dielectric breakdown causes TDDB distributions to be nonunique. The TDDB distributions could be shifted to shorter times if a) the impedance of the test equipment was lowered and/or b) the capacitance of the test equipment was raised. The implications of this work will be discussed in terms of electric/dielectric breakdown models and practical circuit and device operation.

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Properties of high-voltage stress generated traps in thin silicon oxide

Cited by 60 publications

References 35 publications

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

Reliability of NAND Flash Memories: Planar Cells and Emerging Issues in 3D Devices

Stress-induced leakage current (SILC) and oxide breakdown: are they from the same oxide traps?

Differentiation between electric breakdowns and dielectric breakdown in thin silicon oxides

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