Properties and dynamic behavior of electron traps in HfO2/SiO2 stacks

Zhao, Ce Zhou; Zahid, Mohammed; Zhang, J.F.; Groeseneken, G.; Degraeve, R.; Gendt, Stefan De

doi:10.1016/j.mee.2005.04.028

Cited by 38 publications

(30 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Despites many years' research, our understanding of them and the relevant defects is incomplete, because of their complex nature and difficulties in their measurements [1,2]. This work reviews the recent progress in this area.…”

Section: Introductionmentioning

confidence: 99%

“…They can also enhance leakage current and trigger oxide breakdown [3]. As Hf-based gate stack is replacing SiON,~Vth becomes more severe, since a large number of electron traps are reported for Hf-based stacks [1,2].…”

Section: Introductionmentioning

confidence: 99%

“…Fig. 1 shows that electron trapping in a 4 nm HfO z layer leads to a substantial~Vth [2,8]. The ability of an electron to fill a trap depends on the conduction mechanism.…”

Section: Introductionmentioning

confidence: 99%

“…1a and 1b show that the thermally enhanced conduction contributes little to trapping. It has been reported that conduction through stress induced leakage current (SILC) is also inefficient in filling traps [2]. Fig.…”

Section: Introductionmentioning

confidence: 99%

“…In (a), Jg(IIO°C) and Jg(25°C) was used to calculate electron fluency, Ninj, at 110°C and 25°C, respectively. In (b), Jg(25°C) was used to calculate Ninj at both 110°C and 25°C [2]. The sample is ALD HfO z (4 nm)/SiOz(I nm).…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Recent progress in understanding the instability and defects in gate dielectrics

Zhang

Chang

et al. 2008

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

View full text Add to dashboard Cite

This work gives a review of the recent progress in understanding the instability and defects in gate dielectrics. It consists of two parts: electron-trapping for nMOSFETs and positive charging for pMOSFETs. On electron traps, the issues addressed include the relation between conduction mechanism and trap-filling, the capture cross section, location and sensitivity to fabrication techniques. On positive charging, a framework is proposed for the defect and the unique impact of each type of defect on device performance will be shown. Finally, the progress in NBTI measurement will be highlighted.

show abstract

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

“…Fig. 1 shows that electron trapping in a 4 nm HfO z layer leads to a substantial~Vth [2,8]. The ability of an electron to fill a trap depends on the conduction mechanism.…”

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Recent progress in understanding the instability and defects in gate dielectrics

Zhang

Chang

et al. 2008

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

View full text Add to dashboard Cite

show abstract

Traps

Zhang

2014

Wiley Encyclopedia of Electrical and Electronics Engineering

View full text Add to dashboard Cite

Traps are the defects that can capture mobile charge carriers and this article focuses on the traps in gate dielectrics prepared on Silicon substrate, which dominates the modern semiconductor industry. There are two types of traps: the electron traps capture electrons and form negative space charges and the hole traps capture holes and form positive space charges. Traps degrade device performance and their minimization is a key task for the semiconductor device manufacturers. This article will summarize the impact of traps on the performance of devices used in modern semiconductor industry first, including shift in device parameters and device lifetime, time‐dependent dielectric breakdown, stress‐induced leakage, noises, and time‐dependent device‐to‐device variation. The key properties of traps will then be reviewed, including trapping kinetics, capture cross sections, effective densities, energy levels, and physical locations. Attentions will be paid to both the as‐grown traps and the generated ones and their similarity and differences will be highlighted.

show abstract

Defect energy states in high‐K gate oxides

Xiong

Robertson²,

Clark

2006

Physica Status Solidi (b)

View full text Add to dashboard Cite

PACS 71.15.Mb, 71.55.HtThe electrical energy levels of the different charge states of the oxygen vacancy and the oxygen interstitial in HfO 2 are calculated, using density functional methods which do not need a band gap correction. Lattice distortions around the defect sites produce substantial shifts in the energy levels. The energy levels are aligned to those of the Si channel. In HfO 2 , the oxygen vacancy gives an energy level in the Si gap or just above the gap, depending on its charge state. The O vacancy is identified as the main electrically active defect and trap. The oxygen interstitial gives levels just above the oxide valence band, and the neutral interstitial also gives a level near the Si conduction band. The defect wavefunctions are given.

show abstract

Properties and dynamic behavior of electron traps in HfO2/SiO2 stacks

Cited by 38 publications

References 3 publications

Recent progress in understanding the instability and defects in gate dielectrics

Recent progress in understanding the instability and defects in gate dielectrics

Traps

Defect energy states in high‐K gate oxides

Contact Info

Product

Resources

About