Progress, Challenges, and Opportunities in Oxide Semiconductor Devices: A Key Building Block for Applications Ranging from Display Backplanes to 3D Integrated Semiconductor Chips

Abstract

As Si has faced physical limits on further scaling down, novel semiconducting materials such as 2D transition metal dichalcogenides and oxide semiconductors (OSs) have gained tremendous attention to continue the ever‐demanding downscaling represented by Moore's law. Among them, OS is considered to be the most promising alternative material because it has intriguing features such as modest mobility, extremely low off‐current, great uniformity, and low‐temperature processibility with conventional complementary‐metal–oxide–semiconductor‐compatible methods. In practice, OS has successfully replaced hydrogenated amorphous Si in high‐end liquid crystal display devices and has now become a standard backplane electronic for organic light‐emitting diode displays despite the short time since their invention in 2004. For OS to be implemented in next‐generation electronics such as back‐end‐of‐line transistor applications in monolithic 3D integration beyond the display applications, however, there is still much room for further study, such as high mobility, immune short‐channel effects, low electrical contact properties, etc. This study reviews the brief history of OS and recent progress in device applications from a material science and device physics point of view. Simultaneously, remaining challenges and opportunities in OS for use in next‐generation electronics are discussed.

High-Performance Thin-Film Transistor with Atomic Layer Deposition (ALD)-Derived Indium–Gallium Oxide Channel for Back-End-of-Line Compatible Transistor Applications: Cation Combinatorial Approach

“…1 The intriguing features of O/S, such as reasonable carrier mobility, low-temperature deposition, super steep slope, and excellent low leakage characteristics, have driven the replacement of the amorphous and polycrystalline silicon electronics in the advanced display devices. 2 The implementation of O/S TFTs in commercial AMOLED televisions has been enabled by sputtering the O/S active layer in eighth generation (2160 mm × 2460 mm), because of its large-area scalability and good throughput capability. 3−5 Recently, the supreme properties of O/S have gained tremendous attention as a next-generation channel material in 3D DRAM, NAND, and M3D to meet the never-ending Moore's law in the intelligent semiconductor chips.…”

“…Since the invention of amorphous indium gallium zinc oxide ( a -IGZO) as an n -channel material by Hosono and co-workers in 2004, the oxide semiconductor (O/S) has been researched as an alternative thin-film transistor (TFT) backplane for the high-end AMOLED display . The intriguing features of O/S, such as reasonable carrier mobility, low-temperature deposition, super steep slope, and excellent low leakage characteristics, have driven the replacement of the amorphous and polycrystalline silicon electronics in the advanced display devices . The implementation of O/S TFTs in commercial AMOLED televisions has been enabled by sputtering the O/S active layer in eighth generation (2160 mm × 2460 mm), because of its large-area scalability and good throughput capability. − …”

Hydrogen-Doping-Enabled Boosting of the Carrier Mobility and Stability in Amorphous IGZTO Transistors

“…Simultaneously, V TH value tends to be negatively displaced with increasing Sn fraction (Figure S1 and Table S1). Their relative weak M–O (M = Sn 4+ and Ga 3+ ) bond strength compared to those of M–O (M = Ga 3+ and Zn 2+ ) facilitates the formation of V O acting as an electron donor causing the negative displacement of V TH . Conversely, the I OFF value was nearly independent of Sn fraction ranging from 0 to 25 atom %, suggesting that the moderately Sn-doped IGZTO channel layer with ∼30 nm thickness can be fully depleted in the resulting TFTs.…”

“…The device with the highest mobility prepared at P O2 = 10% had a slightly negative V TH value of −0.14 V (Table ). Thus, the pixel switching application requires the positive displacement of V TH for the device at P O2 = 10% through in situ oxygen or post oxygen-treatment etc. , or the a -In 0.29 Ga 0.35 Zn 0.11 Sn 0.25 O device at P O2 = 20% as a pixel switcher can be chosen due to its positive V TH of 0.16 V. However, the carrier mobility for such devices should be mitigated due to the tradeoff between mobility and V TH for the oxide TFTs. − The operational stability of a given TFT is often assessed by the amount of hysteresis in the double sweep IV measurement. The hysteresis effect was not significant in terms of V TH under the double sweep from −20 to 20 V (vice versa) as shown in Figure S5 in SI.…”

High-Gravity-Tuned Synthesis of Uniformly Distributed Silver Bismuth Chromate Semiconductor Crystals

“…Semiconductor crystals have instigated a surge of interest in various fields including physics, materials science, optics, and photocatalysis. − The synthesis of semiconductor crystals with controllable size distribution, morphology, and uniformity influences notable physicochemical properties, thus promoting their applications. − Semiconductor crystals could be fabricated via controlling crystalline parameters to modulate nucleation and crystal growth processes. − Thus, understanding the nucleation and growth mechanisms and developing a methodology for the controllable synthesis of semiconductor crystals are of great significance.…”