Programmable single-electron transistor logic for future low-power intelligent LSI: proposal and room-temperature operation

Uchida, Ken; Koga, J.; Ohba, R.; Toriumi, Akira

doi:10.1109/ted.2003.813909

Cited by 115 publications

(62 citation statements)

References 20 publications

(28 reference statements)

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“…Like several other electronic devices, they uphold the potential to reach the molecular scale and would confine itself in far less space as compared to their conventional counter parts. The small size, fast in action, and low power dissipation of SET circuits make them potentially useful and best competent for next generation logic and memory circuits [8].…”

Section: International Journal Of Computer Applications (0975 -8887) mentioning

confidence: 99%

A Novel Design of SET-CMOS Half Subtractor and Full Subtractor

FathimaThuslim¹

2015

IJCA

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Single Electron transistor have high integration density, ultra-low power dissipation, ultra-small size, unique coulomb blockade oscillation characteristics which makes an attractive technology for future low power VLSI/ULSI systems. The Single Electron Transistor have extremely poor driving capabilities so that direct application to practical circuits is a yet almost impossible, to overcome this problem and to investigate the robustness and fastness of the novel design, the hybrid circuits of SET and CMOS are builded. In this work, novel design of SET-CMOS of Half Subtractor and Full Subtractor circuits are designed.

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Section: International Journal Of Computer Applications (0975 -8887) mentioning

confidence: 99%

A Novel Design of SET-CMOS Half Subtractor and Full Subtractor

FathimaThuslim¹

2015

IJCA

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“…Recently, researchers have fabricated SETs that operate at room-temperature [11][12][13]. Various SET-based circuit applications, such as logic [14][15][16][17] and memory [18][19][20] have been developed. This work provides a promising start for SET circuit design.…”

Section: A Past Workmentioning

confidence: 99%

Characterization of Single-Electron Tunneling Transistors for Designing Low-Power Embedded Systems

Zhu

Dick

et al. 2009

IEEE Trans. VLSI Syst.

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Abstract-Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultra-low-power designs may even permit embedded systems to operate without batteries by scavenging energy from the environment. Moreover, managing power dissipation is now a key factor in integrated circuit packaging and cooling. As a result, embedded system price, size, weight, and reliability are all strongly dependent on power dissipation.Recent developments in nanoscale devices open new alternatives for low-power embedded system design. Among these, single-electron tunneling transistors (SETs) hold the promise of achieving the lowest power consumption. Unfortunately, most analysis of SETs has focused on single devices instead of architectures, making it difficult to determine whether they are appropriate for low-power embedded systems.Evaluating the use of SETs in large-scale digital systems requires novel architectural and circuit design. SET-based design imposes numerous challenges resulting from low driving strength, relatively large static power consumption, and the presence of reliability problems resulting from random background charge effects. We propose a fault-tolerant, hybrid SET/CMOS, reconfigurable architecture, named IceFlex, that can be tailored to specific requirements and allows trade-offs among power consumption, performance requirements, operation temperature, fabrication cost, and reliability. Using IceFlex as a testbed, we characterize the benefits and limitations of SETs in embedded system designs. In particular, we focus on the use of SETs in room-temperature ultra-low-power embedded systems such as wireless sensor network nodes. We also consider higherperformance applications such as multimedia consumer electronics. We see this work as a first step in determining the potential of ultra-low-power embedded system design using SETs.

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“…Therefore, randomness in sizes [1], [2], dopant positions [3], etc. is often utilized to naturally form quantum dots for single-electron devices and qubits of quantum computing [4].…”

Section: Introductionmentioning

confidence: 99%