Production Planning and Control for Semiconductor Wafer Fabrication Facilities

Abstract

In this chapter, we discuss production planning approaches for semiconductor manufacturing. Planning is on the highest level of the PPC hierarchy. Planning approaches provide important input for the order release schemes discussed in Chap. 6. We start by describing short-term planning approaches. Spreadsheet modeling and simulation are used in this situation.Then, we continue by describing master planning approaches in semiconductor manufacturing. They are used to assign production quantities to different facilities in different periods of time for a horizon of several months. Weekly time periods are considered. Simulation-based performance assessment of master planning approaches is briefly discussed. Next, we discuss capacity planning approaches. In contrast to master planning, these approaches deal with a longer planning horizon and monthly time periods. We discuss only deterministic planning approaches for master and capacity planning. Then, we present enterprise-wide planning approaches. In this situation, we consider a planning horizon of several years and quarters as periods. We also deal with the question of whether or not it is beneficial to open new facilities. Deterministic and stochastic settings are described for enterprise-wide planning problems.One typical assumption in planning approaches is a fixed CT; however, the CT is load-dependent. Therefore, we discuss different possibilities to model load-dependent CT within planning approaches. We consider CT-TP curves, iterative simulation, and finally clearing functions. Short-Term Capacity PlanningIn this section, we start by discussing the motivation of spreadsheet-based and simulation-based short-term capacity planning. We then make the first approach more concrete for wafer fabs. Spreadsheet-based short-term capacity planning approaches are discussed for back-end facilities. Finally, short-term capacity planning based on discrete-event simulation is described.

Mixed Integer Programming Approaches to Planning and Scheduling in Electronics Supply Chains

“…The process consists of four basic phases: wafer fabrication, wafer probe, integrated circuit packaging, and final testing. The most-complex and costly process is wafer fabrication (fab); e.g., Mönch et al (2012). Wafers are thin discs made of silicon or gallium arsenide, typically 200 mm to 300 mm in diameter.…”

Heuristic Algorithm for a WIP Projection Problem at Finite Capacity in Semiconductor Manufacturing

“…Mönch et al [1], Uzsoy et al [2], [4] and Gupta et al [5] have mentioned in their reviews different capacity planning techniques used in the semiconductor environment which can be classified in infinite and finite capacity planning techniques. They can also be divided, according to the length of the planning horizon, into long-term (strategic), mid-term (tactical) and short-term (operational) planning tools.…”

“…Figure 6 illustrates projection results of the 10 lots during the first period of the planning horizon. For some lots, a sequence of steps is repeated twice (lots 1,4,5,7,8,9) i.e. lots visit the same toolset twice which illustrates the re-entrant flows.…”

“…This also means that according to the decisions taken on the production line, products may experience various cycle times depending on the priority given either to a given product, to satisfy customer demand, or to a certain technological level for the purpose of line balancing. Hence, the capacity planning issue is difficult to solve and it is particularly more complex than in other industries [1].…”

“…In the considered case study, the lot requires 8 to 10 weeks to be processed. Steps are executed on more than one hundred workstations called "toolset" [1]. Due to flow re-entrance, lots visit the same toolset more than once during the manufacturing process.…”