3D stacked integrated circuit presents unique challenges to testability due to the lack of probe points. High speed memory and IO require fast, and potentially complex link training. Further, compared to the desktop CPUs, phones and tablets present low power challenges for Intel chips. This paper presents the architecture of a reusable Built-InSelf-Test (BIST) engine called CPGC, implemented on Intel 14nm 3DS IC. It is capable of auto-repair for detected memory defects. Silicon results demonstrate CPGC enables easy debug of Inter-symbol-interference (ISI) and crosstalk issues to improve the probe-ability of 3DS IC. It also enables quick and complex IO link training of all memory and IO subsystem. Further, CPGC improved validation time by 3x, and reduced system-on-achip (SOC) and platform power by 5% to 11% through closed loop circuit power optimization/training. This reusable CPGC BIST engine IP solution has been successfully designed into at least 11 Intel CPU/SOCs.