Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC

Abstract

3D stacked integrated circuit presents unique challenges to testability due to the lack of probe points. High speed memory and IO require fast, and potentially complex link training. Further, compared to the desktop CPUs, phones and tablets present low power challenges for Intel chips. This paper presents the architecture of a reusable Built-InSelf-Test (BIST) engine called CPGC, implemented on Intel 14nm 3DS IC. It is capable of auto-repair for detected memory defects. Silicon results demonstrate CPGC enables easy debug of Inter-symbol-interference (ISI) and crosstalk issues to improve the probe-ability of 3DS IC. It also enables quick and complex IO link training of all memory and IO subsystem. Further, CPGC improved validation time by 3x, and reduced system-on-achip (SOC) and platform power by 5% to 11% through closed loop circuit power optimization/training. This reusable CPGC BIST engine IP solution has been successfully designed into at least 11 Intel CPU/SOCs.

Memory built-in self-repair and correction for improving yield: a review

“…Table 2 shows variants of methodologies based on the fundamental principle used and their application. Table 3 Using separate memory for redundancy instead of spare rows/columns [16], [17], [21], [24], [34], [38]…”

“…Another architecture to improve the yield of 3D stacked memories is presented in [17]. It uses spare memory available in DRAM itself to replace any faulty bits.…”

“…Querbach et al [17] presented a repair architecture for field use. The repair feature can be automatic or manual and run at boot via BIOS and firmware.…”

SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure

“…Built-In Self Test (BIST). A BIST mechanism (e.g, [5,52,114,115,150,152]) is implemented inside the DRAM chip to enable xed test patterns and algorithms. Using such an approach, DRAM tests can be performed faster than with other testing platforms.…”