Private circuits II versus fault injection attacks

Henitsoa, Rakotomalala,; Ngo, Xuan Thuy; Najm, Zakaria; Danger, Jean‐Luc; Guilley, Sylvain

doi:10.1109/reconfig.2015.7393338

Cited by 3 publications

(3 citation statements)

References 35 publications

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“…While the PC-I and PC-II version of [31] have the same netlist, and result in a comparable resource consumption, this is not the case for our PRESENT. Instead, we notice a significant overhead for the PC-II implementations compared to the TI version.…”

Section: Resource Comparisonmentioning

confidence: 95%

“…Since each AND, OR and XOR gadget has four inputs and two outputs, we can not pack a single gadget in one Look-up Table (LUT) of our targeted Virtex-II Pro FPGA. This is possible with more recent technologies, as was done for the Virtex-5 in [31]. Therefore, each gadget requires two LUTs.…”

Section: B Gate Transformationmentioning

confidence: 99%

“…A first move towards PC-II implementations was made by Rakotomalala et al [31] at RECONFIG 2015. In summary, the authors implement PC-II with tamper-resistance against reset attacks on an FPGA.…”

Section: Introductionmentioning

confidence: 99%

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More Efficient Private Circuits II through Threshold Implementations

Cnudde

Nikova

2016

2016 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)

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Abstract-Since the introduction of Private Circuits at CRYPTO 2003, several works have attempted its implementation in hardware. Only very recently was an implementation of this masking scheme shown to survive state-of-the-art leakage detection tests. The overhead introduced to achieve the provable security was significant. Similarly, the implementational aspect of Private Circuits II, the tamper-resistant extension of Private Circuits presented at EUROCRYPT 2006, was only recently presented at RECONFIG 2015. It however relied on a combinational PC-I implementation, which is susceptible to both glitches and early evaluation.In this work, we evaluate a recently proposed Private Circuits implementation and its corresponding Threshold Implementation side by side and give a full comparison in an equal and fair setting. In succession, we take the smallest resulting masking scheme as basis for a new approach towards a secure PC-II implementation. In addition to quantifying the resource overhead of PC-II, our work provides detailed instructions on how to achieve PC-II in FPGAs.

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Section: Resource Comparisonmentioning

confidence: 95%

Section: B Gate Transformationmentioning

confidence: 99%